Patent
1991-03-11
1992-08-11
Davie, James W.
357 67, H01L 2348
Patent
active
051384329
ABSTRACT:
An improved process for preparing selective deposition of conductive metals on disilicide encroachment barriers allows the construction of integrated circuit components wherein the metal/disilicide interface is substantially free of O and/or F contamination. The level of interfacial oxygen and/or fluorine contamination in the selective W deposition on the TiSi.sub.2 was substantially reduced or eliminated by first forming a C49 TiSi.sub.2 phase on a substrate, selectively depositiong W on the C49 TiSi.sub.2 phase and thereafter annealing a a (minimum) temperature sufficient to convert the high resistivity phase C49 TiSi.sub.2 to the low resistivity phase C54 TiSi.sub.2.
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Allen Leslie H.
Mayer James W.
Stanasolovich David
Cornell Research Foundation Inc.
Davie James W.
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