Selective data synchronizer

Details Selective data synchronizer Selective data synchronizer

1992-07-14

1995-05-09

Beausoliel, Jr., Robert W.

Excavating

360 45, 371 671, H04L 108

Patent

active

054147220

ABSTRACT:
The present invention discloses a method and an apparatus for the detection and correction of incorrectly digitized read data pulses corresponding to the pulses of an analog read signal generated from the reading of data from a magnetic storage tape. Detection of incorrectly digitized read data pulses is performed by delaying the signal to obtain a nominal signal and delaying the nominal signal to obtain a late signal. A recovered clock signal is used to synchronize and detect each of the early, nominal and late signals to obtain early, nominal and late synchronized data signals consisting of binary values. A predetermined number of binary values of each of the synchronized data signals is stored within first, second and third memory means. These binary values are then compared to determine whether any of the corresponding read data pulses were detected within an incorrect timing cell of the recovered clock. If the binary values within a preselected cell of each of the synchronized data signals are not the same, error correction is performed by comparing the contents of the memory means with error patterns empirically derived and selecting an appropriate binary value as the correct output of the data separator. If no error exists, then the binary value of a preselected cell is chosen as the correct data separator output.

REFERENCES:
patent: 3670304 (1972-06-01), Andresen et al.
patent: 3827078 (1974-07-01), Bauer
patent: 4264935 (1981-04-01), Lee
patent: 5068754 (1991-11-01), Garde
patent: 5261082 (1993-11-01), Ito et al.

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