Pulse or digital communications – Synchronizers – Self-synchronizing signal
Reexamination Certificate
1994-01-14
2001-05-08
Luther, William (Department: 2664)
Pulse or digital communications
Synchronizers
Self-synchronizing signal
C375S371000
Reexamination Certificate
active
06229862
ABSTRACT:
BACKGROUND OF THE INVENTION CLOCK RECOVERY
1. Field of the Invention
The present invention relates to the recovery of timing information from a digital data signal, in particular, though not exclusively, to the recovery of timing information from analogue processed digital data signals.
2. Related Art
Accurate recovery of timing information is necessary for the processing of digital data. Where digital data has undergone some form of analogue processing e.g. to form a radio frequency signal, that recovery becomes difficult. With modulation techniques such as Quadrature Amplitude Modulation (QAM) accurate clock recovery is essential because of its multilevel constellation. A particular problem for QAM transmissions over mobile radio links is that where a high symbol rate is employed e.g. 8 MBd, significant Inter Symbol Interference (ISI) occurs. This ISI produces a number of complications which render many conventional clock recovery schemes unsuitable. In addition to ISI, the carrier is suppressed in QAM, and the symbol timing is difficult to track because of the deep fades and the violent phase changes that accompany these fades in mobile radio channels. The ISI distorts the received waveform, but equalization prior to the clock recovery circuit cannot be used to remove this distortion as the equalizer would be required to work before the clock recovery system could operate properly, and almost all equalizers require accurate clock recovery for correct operation.
The present invention seeks in particular though not exclusively to provide a clock recovery system which operates on signals corrupted with ISI. This would make receiver operation more robust, allow an equalizer to function in isolation, and thereby avoid the problems caused by clock recovery/equalizer interaction.
A known method is early-late (EL) clock recovery. As the correct sampling time in most modulation schemes is at the peaks of the incoming signal and these peaks are normally symmetrical, the EL clock recovery system tries to detect any asymmetry in the incoming signal around the current sampling point. It does this by taking two samples of the incoming waveform, one just before the current sampling time, and one just after it. If the pulse is symmetrical and the sampling time is correct then the magnitude of these two samples will be the same. The EL system subtracts one sample from the other and uses the difference signal to update a phase locked loop (PLL). The incoming signal must first be squared to make all peaks positive as otherwise the error signals would have different polarities for positive and negative peaks.
A major problem with EL clock recovery for QAM transmissions is that not all QAM sequences result in peaks occurring every sampling period. Further, half the peaks are of the wrong polarity for the clock recovery technique. This problem is illustrated in FIGS.
1
(
a
)-
1
(
c
) where the polarity of the early signal minus the late signal is considered for a number of QAM sequences when in all cases the sampling point is too early. Consequently, the early signal minus the late signal should be negative, and this is represented in FIGS.
1
(
a
) and(
c
) as “E-L Negative”. In these examples we consider only the I channel for simplicity. The practical implementation of this scheme would have independent EL recovery systems for both the I and Q channels, except that they would drive the same PLL.
In FIG.
1
(
a
) we observe the QAM sequences 1,3,1 and −1, −3, −1, where the first number refers to the modulation level on the channel I transmitted in the symbol period prior to the one in which we are attempting peak detection. The second number in the sequence refers to the modulation level in the symbol period in which we attempt peak detection, while the third number refers to the modulation level in the symbol period after the one in which we attempt peak detection. Note we are not considering an oversampled waveform but three independent symbols. Squaring these sequences, which is an integral part of EL process, results in correct E-L polarity.
In FIG.
1
(
b
) we observe the sequences 3,1,3 and −3, −1, −3 It can be seen that despite sampling occurring early as in (
a
), the E-L value is of the opposite polarity to (
a
).
Also problematic are sequences such as −1, 1, 3 and 3,−1, 3 shown in FIG.
1
(
c
) where the monotonic waveform leads to negative early-late difference signals regardless of whether the sampling is early or late.
The consequence of this is that the early-late difference signal which should be negative in this case, is correct for only a fraction of the transmitted symbols. The peaks of the type in FIG.
1
(
b
) will cause an incorrect signal to be generated, and the monotonic waveforms of FIG.
1
(
c
) will on average cause an equal distribution of correct and incorrect signals. This makes it difficult for the system to maintain lock.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect the invention provides a method of recovering timing information from a digital data signal, characterized by periodic assessment of the signal to determine the suitability of a part of the signal for providing timing information.
According to a second aspect the invention provides a method of recovering timing information from a digital data signal, comprising the steps of:
a) assessing whether a part of the signal has one or more characteristics indicative of the suitability of that part of the signal for providing timing information; and
b) determining a timing point from a part of the signal having said at least one characteristic.
According to a third aspect of the invention there is provided a clock recovery system for recognising timing information from a digital data signal comprising:
a peak detector for establishing the occurrence of a peak in a part of the signal;
a peak evaluator for determining the suitability of the peak for providing timing information; and
means for providing timing information for updating a clock on the basis of the occurrence of a suitable peak in the digital data signal.
REFERENCES:
patent: 4520492 (1985-05-01), Weber
patent: 4648100 (1987-03-01), Mardirosien
patent: 4912726 (1990-03-01), Iwamatsu et al.
patent: 5111484 (1992-05-01), Karabinis
patent: 5200981 (1993-04-01), Carmon
patent: 0080020 (1982-07-01), None
patent: 0296253 (1988-01-01), None
British Telecommunications public limited company
Luther William
Nixon & Vanderhye P.C.
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