Selective call receivers with integer divide synthesizers for ac

Details Selective call receivers with integer divide synthesizers for ac Selective call receivers with integer divide synthesizers for ac

1995-08-04

1998-04-28

Eisenzopf, Reinhard J.

Telecommunications

Transmitter and receiver at same station

With frequency stabilization

455 87, 455112, 455113, 455260, 455265, 34082544, 332127, H04B 150

Patent

active

057458430

ABSTRACT:
A selective call receiver (100) for receiving and transmitting paging signals has a transceiver (104) having an integer divide synthesizer (105) for achieving a fast lock time. The transceiver (104) has a reference oscillator (202) that generates a reference signal in a direct injection path and a modulator (206) coupled in the direct injection path modulates the reference signal to generate a modulated reference signal. A phase locked offset loop (220) coupled to the direct injection path generates a low frequency signal derived from the reference signal, a multiplier (210) coupled to the modulator (206) multiplies the modulated reference signal, and a mixer (214) coupled to the multiplier (210) receives the modulated reference signal in the direct injection path and an output signal from the phase locked offset loop (220) to generate a first local oscillator output signal and a modulated transmit carrier.

REFERENCES:
patent: 4755774 (1988-07-01), Heck
patent: 5263197 (1993-11-01), Manjo et al.
patent: 5471652 (1995-11-01), Hulkko
patent: 5542113 (1996-07-01), Fink et al.
patent: 5606739 (1997-02-01), Goto

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