Selective call receiver having an apparatus for modifying an...

Pulse or digital communications – Receivers

Reexamination Certificate

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Details

C341S143000

Reexamination Certificate

active

06275540

ABSTRACT:

FIELD OF THE INVENTION
This invention relates in general to selective call receivers, and particularly to a selective call receiver having an apparatus for modifying an analog signal to a digital signal and method therefor.
BACKGROUND OF THE INVENTION
With the advent of new digital technologies, consumer products, such as battery operated selective call receivers, are utilizing high-speed analog-to-digital converters (ADC's) to replace a substantial portion of conventional radio demodulation circuits. This change in design is driven by advancements in the development of ADC's. One such advancement is the sigma-delta converter. Particularly, sigma-delta converters have been used because of their simplicity and their advantageous noise characteristics over other conventional ADC's such as successive approximation ADC's. A characteristic of sigma-delta converters, which makes them unique from other converters, is the technique of oversampling the input signal (by, e.g., five-times the Nyquist frequency). This oversampling technique, however, becomes disadvantageous when the input signal is not at a low frequency, e.g., baseband.
FIG. 1
shows an electrical block diagram of a prior art bandpass sigma-delta converter
100
. The bandpass sigma-delta converter
100
comprises a difference circuit
104
, a bandpass filter
108
, a sigma-delta converter
114
, and a digital-to-analog converter (DAC)
118
. During normal operation, the difference circuit
104
combines an analog input signal
102
with an analog feedback signal
120
to produce an analog output signal
106
. In this example, the analog input signal
102
operates at a given intermediate or carrier frequency (e.g., 200 MHz). The analog output signal
106
is then filtered by the bandpass filter
108
at the center frequency of the signal to produced a filtered analog signal
110
. The filtered analog signal
110
is then converted by the sigma-delta converter
114
to a digital signal
116
. Finally, the digital signal
116
is converted to the analog feedback signal
120
by the DAC
118
.
Since the analog input signal
102
is not at baseband, and the sigma-delta converter
112
is operating from a clock source
112
at several times the Nyquist rate, several problems arise. For example, for a sigma-delta converter operating at a five-times oversampling frequency, an analog input signal
102
having a carrier frequency of 200 MHz is sampled at 1 GHz. This is undesirable in that the sigma-delta converter
114
must operate at a high clock rate, which results in a high measure of power dissipation. Additionally, the complexity of designing high-speed digital circuits at rates up to 1 GHz is substantial, and impractical for mass production.
Accordingly, a selective call receiver utilizing a method and apparatus that overcomes the foregoing disadvantages in the prior art is desirable.


REFERENCES:
patent: 4308524 (1981-12-01), Harrison et al.
patent: 5087914 (1992-02-01), Sooch et al.
patent: 5103229 (1992-04-01), Ribner
patent: 5392042 (1995-02-01), Pellon
patent: 5953636 (1999-09-01), Keate et al.
Paul R. Gray And Robert G. Meyer,Analysis And Design Of Analog Integrated Circuits,Second Edition, pp. 593-599, New York, 1977.
Sangil Park, Ph.D.,Motorola Deigital Signal Processors, principles of Sigma-Delta Modulation for Analog-to-Digital Converters,Motorola APR8/D Rev. 1, 1993.
James C. Candy and Gabor C. Temes,Oversampling Methods for A/D and D/A Conversion,Source unknown.

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