Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-12-17
2003-12-09
Powell, William A. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S742000
Reexamination Certificate
active
06660650
ABSTRACT:
CROSS-REFERENCE TO RELATED PATENT/PATENT APPLICATIONS
The following commonly assigned patent/patent applications are hereby incorporated herein by reference:
Patent No./Serial No.
Filing Date
TI Case No.
09/467,108
12/17/1999
TI-23187
08/988,686
12/11/1997
TI-22166
FIELD OF THE INVENTION
The instant invention pertains to semiconductor device fabrication and processing and more specifically to a method of fabricating an aluminum plug with an etchback process.
BACKGROUND OF THE INVENTION
Presently, in the semiconductor device manufacturing industry, manufacturers are constantly trying to reduce the size of the semiconductor devices while also trying to reduce the power consumed by each device. In order to make the devices smaller, so as to fit more devices within a given area, the devices are made to be more compact. This can be problematic with respect to the conductive structures because the resistance of a conductor is proportional to the resistivity of the material used but inversely proportional to the cross-sectional area of the conductor. Hence, as the cross-sectional area is reduced the resistivity should be reduced so as to offset the difference in the resistance of the structure. Furthermore, since the other trend in the industry relates to the reduction of power consumption by the device, it is preferable to reduce the resistivity of the conductor as much as possible, because power consumption is proportional to the resistance of the conductive structure.
Tungsten plugs have been used for via and contact fill for quite some time in the semiconductor manufacturing industry. However, its resistivity is higher than other conductors and as contact and via diameters become smaller and aspect ratios become larger, these vias become more difficult to fill with traditional tungsten deposition techniques. In addition, traditional tungsten deposition techniques (usually accomplished by chemical vapor deposition, CVD, of the tungsten) require barrier and glue layers which raise the processing cost and complexity. Selective tungsten formation has been attempted but has not lead to any practical semiconductor processes.
Due to the lower resistivity of aluminum as compared to tungsten, aluminum plugs offer the potential for lower via and contact resistance. Sputter-reflow of aluminum is a relatively inexpensive alternative to CVD tungsten, but it has not been successfully implemented for technology nodes less than 0.35 micron. CVD aluminum is an alternative to CVD tungsten processing and is being investigated throughout the industry for various structures. In addition, since CVD aluminum requires lower processing temperatures, it can be integrated with polymer-based low dielectric constant dielectrics. However, due to its nonconformal nature, blanket CVD aluminum is subject to void formation when used to form the plug in a via with a higher aspect ratio or when the via or contact is small. Another disadvantage of CVD aluminum is that it should be formed on a nucleation layer.
Selective CVD aluminum has been attempted in the industry. Basically, it involves the selective deposition of aluminum on metal surfaces without being deposited on oxide surfaces. With respect to via or contact formation, the via or contact is formed upwardly from the bottom, thereby eliminating the void formation that blanket aluminum deposition suffers from when the topography is re-entrant. One advantage of this method is that it can be used to fill deep submicron vias and contacts without voids. In addition, selective CVD aluminum does not require an underlying liner or nucleation layer.
A couple issues with selective CVD aluminum processing involve the removal of any undesired non-selective depositions and the recessing of the plug. For plug recessing and the removal of any unwanted non-selective deposition, chemical mechanical polishing (CMP) of the aluminum has been used, but CMP can be costly and complex. Aluminum CMP and cleanup processing is still relatively new and they are problematic due to dishing and scratching of the soft aluminum.
SUMMARY OF THE INVENTION
An embodiment of the instant invention is a method of fabricating an electronic device over a semiconductor substrate having an interconnecting structure comprised of aluminum, the method comprising the steps of: forming a conductive structure comprised of a metal; forming a dielectric layer over the conductive structure, the dielectric layer having an upper surface; forming an opening in the dielectric layer so as to expose a portion of the conductive structure, the opening having sidewalls; selectively depositing an aluminum-containing conductive material in the opening; and performing an etchback process so as to remove any of the aluminum-containing conductive material formed on the hardmask and so as to etch back any portion of the aluminum-containing conductor which is situated over the upper surface of the dielectric layer. In an alternative embodiment, the method further comprises the step of: forming a hardmask on the upper surface of the dielectric layer, the hardmask having an upper surface and being formed prior to the step of forming an opening in the dielectric layer; and wherein an opening is formed in the hardmask prior to the step of forming an opening in the dielectric layer. Preferably, the hardmask is comprised of material which is etched using an etchant which does not substantially etch the dielectric layer. This material is preferably a nitride (more preferably, silicon nitride). The aluminum-containing conductive material is comprised of: substantially pure aluminum or an aluminum alloy. The conductive structure is comprised of: aluminum or a TiN structure situated on an aluminum structure. Preferably, the exposed conductive structure is the aluminum structure.
Another embodiment of the instant invention is a method of fabricating an electronic device over a semiconductor substrate having an interconnecting structure comprised of aluminum, the method comprising the steps of: forming a conductive structure comprised of aluminum; forming a dielectric layer over the conductive structure, the dielectric layer having an upper surface; forming a hardmask layer on the upper surface of the dielectric layer, the hardmask having an upper surface and comprised of silicon nitride; forming an opening in the hard mask so as to expose a portion of the dielectric layer, the opening having sidewalls; forming an opening in the exposed portion of the dielectric layer so as to expose a portion of the conductive structure, the opening having sidewalls; selectively depositing an aluminum-containing conductive material in the opening; performing an etchback process so as to remove any of the aluminum-containing conductive material formed on the hardmask and so as to etch back any portion of the aluminum-containing conductor which is situated over the upper surface of the hardmask; and wherein the dielectric layer is not substantially etched by the etchant used to etch the opening in the hardmask. Preferably, the aluminum-containing conductive material is comprised of: substantially pure aluminum or an aluminum alloy. The conductive structure is, preferably, comprised of a TiN structure situated on an aluminum structure and the exposed portion of the conductive structure is the aluminum structure.
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T. Amazawa et al., “A 0.25um Via Plug Process Using Selective CVD Aluminum For Multilevel Interconnection”, Electron Devices Meeting, 1991. IEEE Technical Digest., International, Dec. 8-11, 1991, pp 265-268.
Hong Qi-zhong
Hsu Wei-yung
Konecni Anthony J.
Brady III Wade James
Powell William A.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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