Selection of partial scan flip-flops to break feedback cycles

Details Selection of partial scan flip-flops to break feedback cycles Selection of partial scan flip-flops to break feedback cycles

1993-12-02

1996-03-26

Trans, Vincent N.

Boots, shoes, and leggings

371 223, G01I 3128

Patent

active

055026460

ABSTRACT:
In partial scan testing of a circuit the optimal quantity of scan flip-flops required to eliminate all feedback, except self-loops, in a circuit is determined. For determining a minimal feedback vertex set (MFVS) for the S-graph of a circuit to be tested, MFVS-preserving transformations, partitioned search strategy and integer linear program (ILP)-based lower bounding techniques are combined to obtain an exact algorithm for computing the MFVS. The result is used in the fabrication of the circuit with minimal overhead in terms of area and performance degradation as a result of providing the capability to perform partial scan testing of the fabricated circuit.

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V. Chickermane et al, "A Fault Oriented Partial Scan Design Approach", in Proc. In'tl Conf. on CAD, pp. 400-403, Nov. 1991.

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