Selecting die placement on a semiconductor wafer to reduce...

Details Selecting die placement on a semiconductor wafer to reduce... Selecting die placement on a semiconductor wafer to reduce...

2007-03-13

2007-03-13

Hollington, Jermele (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

Reexamination Certificate

active

10799061

ABSTRACT:
A die placement of dies on a wafer is selected to reduce test time of the dies by obtaining a die placement and determining placements of a tester head needed to test the dies in the die placement. A number of touchdowns needed in the determined placements of the tester head is determined, where a touchdown involves lowering the tester head to form an electrical contact between pins on the tester head and bonding pads on a die being tested. The die placement is adjusted to reduce the number of touchdowns.

REFERENCES:
patent: 5654204 (1997-08-01), Anderson
patent: 6555400 (2003-04-01), Farnworth et al.
patent: 6640423 (2003-11-01), Johnson et al.
patent: 6703170 (2004-03-01), Pindo
patent: 6777971 (2004-08-01), Kirloskar et al.
patent: 6826738 (2004-11-01), Cadouri
patent: 6841796 (2005-01-01), Farnworth et al.

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