Excavating
Patent
1997-07-25
1999-08-10
Nguyen, Hoa T.
Excavating
39518319, 371 225, G01R 3128, G06F 1100
Patent
active
059369760
ABSTRACT:
A testing apparatus and method are for testing a plurality of logic blocks within an integrated circuit. The integrated circuit includes a test data input bus, a test data output bus coupled to the output of each logic block, and test enable means which includes selection means coupled between the plurality of logic blocks and the test data input bus. The test enable means selects a first logic block from the plurality of logic blocks, and the selection means selectively inputs to each logic block either normal operating input or the test data. The test results are received from the first logic block through the test data output bus.
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Fickes Michael James
Nomura Koichi Eugene
Story Franklyn H.
Nguyen Hoa T.
VLSI Technology Inc.
Weller Douglas L.
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