Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Phase shift by less than period of input
Reexamination Certificate
1998-11-16
2001-01-09
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Phase shift by less than period of input
C327S245000, C327S270000, C327S259000
Reexamination Certificate
active
06172542
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to crossover adjustment circuits generally and, more particularly, to an output crossover adjustment circuit that may be used to provide edge compensation in a device, such as a universal serial bus device.
BACKGROUND OF THE INVENTION
The universal serial bus (USB) has a variety of operating modes that allow a number of computer peripherals to be connected to a generic port. One of the modes of a USB device is a high speed mode. One design criteria involved with USB devices is that the crossover voltage of the differential signals must be tightly controlled. As a result, the USB device must be designed to provide the proper crossover at the output across voltage, temperature, and device processing variations.
A universal serial bus (USB) driver may take a single data and have an increment and a decrement signal. The increment and decrement signals are exclusive of each other. The signals cause the edge relationship of the two outputs to either lead/lag or lag/lead. The signals cause the entire waveform to either lead or to lag without distorting the waveform. Conventional approaches would change the rise or fall time of the signals in addition to varying the delay. These rise/fall time distortions can cause problems in the output driver stages. An example of a circuit that delays a single edge may be found in co-pending application “METHODS, CIRCUITS AND DEVICES FOR IMPROVING CROSSOVER PERFORMANCE AND/OR MONOTONICITY, AND APPLICATIONS OF THE SAME IN A UNIVERSAL SERIAL BUS (USB) LOW SPEED OUTPUT DRIVER”, Ser. No. 08/934,933, Filed Sep. 22, 1997, which is hereby incorporated by reference in its entirety.
Alternately, two separate drivers could be implemented. However, this would be at the expense of additional associated overhead. Each universal serial bus device has two outputs, a plus output and a minus output. A driver circuit implementing separate drivers would have to be implemented, at a minimum, at each of the plus and minus outputs. In an application that provides a number of universal serial bus outputs on a single device, the number of instances that a driver would have to be duplicated increases accordingly. As a result, it is desirable for the number of components in a driver circuit be kept to a minimum in order to reduce the overall area required to implement the plurality of required buffers at the various outputs.
SUMMARY OF THE INVENTION
The present invention concerns a circuit comprising an input circuit and an adjustable delay. The input circuit may be configured to generate a differential signal in response to a single ended signal. The adjustable delay may be configured (i) to delay or not change a rising edge or (ii) delay or not change a falling edge of a first portion of the differential signal. A second adjustable delay may be configured to (i) delay or not change a rising edge or (ii) delay or not change a falling edge of a second portion of the differential signal. The differential signal may be presented to an output buffer in a Universal Serial Bus device. The present invention may also include a squaring circuit that may be configured to improve the differential alignment between the first and second portions of the differential signal.
The objects, features and advantages of the present invention include providing an output buffer that includes a trim circuit that may move a particular edge forward or backwards so the crossover voltage can be locked in.
REFERENCES:
patent: 5012141 (1991-04-01), Tomisawa
patent: 5140174 (1992-08-01), Meier et al.
patent: 5751176 (1998-05-01), Sohn et al.
patent: 5977809 (1999-11-01), Wang et al.
Snyder Warren S.
Williams Timothy J.
Christopher P. Maiorana P.C.
Cypress Semiconductor Corp.
Tran Toan
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