Selectable interface between memory controller and memory simms

Details Selectable interface between memory controller and memory simms Selectable interface between memory controller and memory simms

1993-11-08

1994-12-20

Yoo, Do Hyun

Static information storage and retrieval

Interconnection arrangements

365 51, G11C 504

Patent

active

053750845

ABSTRACT:
A computer system is provided which includes a CPU having a memory controller interconnecting the CPU to a bus. The bus has card receptacles having pin receiving sockets electrically connected to the bus to receive the pins of memory cards. The memory controller is connected to logic which will identify the type of memory card which is inserted in the pin sockets. From this identification combinational logic is provided that, in response to the identification of the type of card, will direct the appropriate signals from the memory controller to the appropriate sockets depending upon which type of card is plugged into the socket. In this way, a given socket configuration can accept different types of memory cards having different pin signal configurations without physical modification of the sockets.

REFERENCES:
patent: 4797850 (1989-01-01), Amitai
patent: 5157384 (1992-10-01), Greanias et al.
patent: 5212666 (1993-05-01), Takeda
patent: 5270964 (1993-12-01), Bechtolsheim et al.
patent: 5272664 (1993-12-01), Alexander et al.
IBM Docket Dossier dated Jan. 10, 1990 re their ref. No. BC9-90-044 regarding invention entitled "Data Processing Apparatus for Dynamically Setting Timing in a Dynamic Memory System".
IBM Technical Disclosure Bulletin, vol. 34, No. 10B, dated Mar., 1992 (pp. 91-94).

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