Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2000-02-24
2004-07-06
Patel, Ajit (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S386000
Reexamination Certificate
active
06760341
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to arrangements for switching data packets in switched local area networks, in particular to arrangements for cascading multiple multiport network switches to increase the number of ports in a network switching arrangement.
2. Background Art
A multiport network switch in a packet switching network is coupled to stations on the network through its multiple ports. Data sent by one station on a network to one or more other stations on the network are sent through the network switch. For example, commonly-assigned U.S. Pat. No. 5,953,335 discloses a network switch configured for switching layer
2
type Ethernet (IEEE 802.3) data packets between different network nodes. The network switch determines the destination of a received data frame from the data frame header. The network switch then transmits the data frame from the appropriate port to which the destination network station is connected.
A single Ethernet network switch may have a number of 10/100 Mbps ports, equaling, for example, 12 ports. The number of end stations connected to the single network switch is limited by the number of ports (i.e., port density) on the network switch. However, today's users of networking devices demand flexibility and scalability without such constraints. To address this need, manufacturers have developed modular architectures that enable cascading of identical networking devices or network switch modules. By cascading these devices in a loop, port density can be readily increased without redesign or development of costly interfaces.
Unfortunately, as the number of cascaded switches increases, so does the system latency (i.e., the aggregate processing delay of the switches). This system latency is attributable in part by the manner in which the switches store and retrieve the data frames in memory. One traditional memory architecture employs individual, local memories for each cascaded switch, as shown in FIG.
1
. In this example, three multiport switches
12
a
,
12
b
and
12
c
are cascaded together to permit the exchange of data frames received by any one of the switches and subsequent forwarding of the data frames out of a different multiport switch. These switches
12
a
,
12
b
and
12
c
have a memory interface, e.g.,
14
a
,
14
b
, and
14
c
, respectively, that enable the switches
12
a
,
12
b
and
12
c
to access their respective memories
16
a
,
16
b
, and
16
c
to write and read the data frames.
For purposes of explanation, assume that a data frame is received at a port (i.e., receive port) on switch
12
a
and that the data frame is destined for a node attached to a port on a different switch
12
c
. The switch
12
a
first stores the received data frame in its corresponding memory
16
a
, and then determines whether to output the received data frame on one of its own network switch ports, or to send the data frame to the next switch in sequence. Since the data frame is destined for switch
12
c
, the data frame is retrieved from the memory
16
a
and forwarded to the next switch
12
b
via the switch
12
a
's cascade port (i.e., the port to which the neighboring switches are connected). Upon receiving the data frame, the switch
12
b
stores the data frame in its corresponding memory
16
b
. The switch
12
b
then determines that the data frame is destined for switch
12
c
, hence the switch
12
b
retrieves the data frame from the memory
16
b
and forwards the data frame to the next switch
12
c
via the switch
12
b
's cascade port. Once the data frame arrives at switch
12
c
, the switch
12
c
writes the data frame into its corresponding memory
16
c
while determining whether the data frame should be output on one of its switch ports. Upon determining that the data frame should be output on one of its switch ports that serves the destination node, the switch
12
c
reads the stored data frame from the memory
16
c
and outputs the data frame on the appropriate switch port.
As evident by this example, the successive series of write and read operations between the multiple memory devices imposes substantial delays within the switching system. Hence, the addition of multiple switch modules and a cascaded sequence may create substantial latency problems, resulting in congestion within the switching system.
SUMMARY OF THE INVENTION
There is a need for an arrangement that enables multiple network switch modules to be cascaded for increasing port density, while minimizing system latency.
There is also a need for an arrangement that enables multiple network switch modules to be cascaded, without the necessity of repeated storage and transfer of frame data between respective buffer memory devices.
There is also a need for arrangement that provides an efficient management of stored frame data in a network switching system having multiple cascaded switch modules.
These and other needs are attained by the present invention, where a network switching system having a plurality of multiport switch modules and respective connected buffer memory devices assigns in each of the buffer memory devices a memory segment for storage of frame data from a corresponding one of the switch modules. In particular, each memory device is divided into memory segments, also referred to as memory regions, wherein each memory segment is configured for storing frame data from a corresponding one of the switch modules. Hence, each switch module is configured for writing frame data, for a data frame received on one of the corresponding switch ports, into the corresponding assigned memory segment of each of the buffer memory devices. In contrast, any one of the switch modules can access any location of the buffer memory devices, enabling any one switch module to retrieve frame data from the buffer memory devices that was stored by another one of the switch modules. In addition, the assignment of memory segments enables a switch module having accessed frame data from the buffer memory to determine the switch module that originally stored the frame data based on the location of the stored frame data within one of the memory segments, simplifying buffer memory resource management.
One aspect of the present invention provides a method in a network switching system having switch modules and buffer memory devices, each of the buffer memory devices connected to a corresponding one of the switch modules. The method includes assigning in each of the buffer memory devices a memory segment for storage of frame data from a corresponding one of the switch modules. The method also includes storing in each of the buffer memory devices a corresponding portion of a data frame, received by a first of the switch modules, at a same prescribed location within the corresponding memory segment assigned to the first of the switch modules. The assignment of a memory segment for each of the switch modules provides simplified buffer memory resource management, since any switch module accessing any one of the buffer memory devices can identify, for a given stored data frame, the switch module that wrote the data frame into the buffer memory devices based on the location of the stored data frame within the buffer memory devices. Hence, the switch modules can identify stored data frames using frame pointers, where the frame pointers can be returned to the originating switch module (i.e., the switch module that wrote the data frame into the buffer memory devices) after the corresponding data frame has been output from the switching system. In addition, the storage of a corresponding portion of a data frame in each of the buffer memory devices at the same prescribed location tables any one of the switch modules to read the frame data using a single read operation.
Another aspect of the present invention provides a network switching system. The network switching system includes first and second multiport switch modules configured for receiving first and second data frames, respectively, each multiport switch module having a memory interfac
Erimli Bahadir
Krishna Gopal
Advanced Micro Devices , Inc.
Ha Yvonne Quy
Manelli Denison & Selter PLLC
Patel Ajit
Turkevich Leon R.
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