Boots – shoes – and leggings
Patent
1983-05-18
1987-03-31
Thomas, James D.
Boots, shoes, and leggings
G06F 1210
Patent
active
046547770
ABSTRACT:
An address translation system is provided which has a real storage, a virtual storage having a "V.dbd.R" segment (first segment), second segments to be subjected to two-level paging, and page table segments (third segments) to be used as a page table corresponding to the second segments, a segment table, a first page table which corresponds to the second segments, a second page table which corresponds to the page table segments, and a memory control unit having a virtual address register and a microprocessor for translating the virtual address in the virtual address register into a real address. By means of microprogram control, the microprocessor has a first address translation function for obtaining a real address from the page number and the displacement data of the virtual address if the segment number of the virtual address represents the first segment, a segment table referring function for referring to the segment table based on the segment number if the segment number does not represent the first segment, and a second address translation function for referring to the second page table based on the reference result from the segment table and the several most significant bits of the page number, for referring to the first page table based on the reference result of the second page table and on the remaining bits of the page number, and for obtaining the real address from the reference result of the first page table and the displacement data.
REFERENCES:
patent: 3764996 (1973-10-01), Ross
patent: 4128875 (1978-12-01), Thurber et al.
patent: 4155119 (1979-05-01), De Ward et al.
patent: 4356549 (1982-10-01), Chueh
patent: 4376297 (1983-03-01), Anderson et al.
patent: 4386399 (1983-05-01), Rasala et al.
patent: 4569018 (1986-02-01), Hummel et al.
Lynt C. H.
Thomas James D.
Tokyo Shibaura Denki Kabushiki Kaisha
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