Television – Format conversion – Line doublers type
Reexamination Certificate
2006-11-14
2006-11-14
Hsia, Sherrie (Department: 2622)
Television
Format conversion
Line doublers type
C348S458000
Reexamination Certificate
active
07136108
ABSTRACT:
A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.
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Chan Thomas M.
Nagakura Clyde H.
Zhou Qinggang
Hsia Sherrie
Imperium Patent Works
Wallace Darien K.
Wallace T. Lester
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