Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Repairing
Reexamination Certificate
2001-10-17
2003-12-09
Ryan, Patrick (Department: 1741)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Repairing
C205S122000
Reexamination Certificate
active
06660153
ABSTRACT:
FIELD OF THE INVENTION
1. Background of the Invention
This invention relates generally to the field of seed layers for subsequent metallization. In particular, this invention relates to methods for repairing seed layers prior to metallization.
2. Description of the Related Art
The trend toward smaller microelectronic devices, such as those with sub-micron geometries, has resulted in devices with multiple metallization layers to handle the higher densities. One common metal used for forming metal lines, also referred to as wiring, on a semiconductor wafer is aluminum. Aluminum has the advantage of being relatively inexpensive, having low resistivity, and being relatively easy to etch. Aluminum has also been used to form interconnections in vias to connect the different metal layers. However, as the size of via/contact holes shrinks to the sub-micron region, a step coverage problem appears which in turn can cause reliability problems when using aluminum to form the interconnections between the different metal layers. Such poor step coverage results in high current density and enhances electromigration.
One approach to providing improved interconnection paths in the vias is to form completely filled plugs by using metals such as tungsten while using aluminum for the metal layers. However, tungsten processes are expensive and complicated, tungsten has high resistivity, and tungsten plugs are susceptible to voids and form poor interfaces with the wiring layers.
Copper has been proposed as a replacement material for interconnect metallizations. Copper has the advantages of improved electrical properties as compared to tungsten and better electromigration property and lower resistivity than aluminum. The drawbacks to copper are that it is more difficult to etch as compared to aluminum and tungsten and it has a tendency to migrate into the dielectric layer, such as silicon dioxide. To prevent such migration, a barrier layer, such as titanium nitride, tantalum nitride and the like, must be used prior to the depositing of a copper layer.
Typical techniques for applying a metal layer, such as electrochemical deposition, are only suitable for applying copper to an electrically conductive layer. Thus, an underlying conductive seed layer, typically a metal seed layer such as copper, is generally applied to the substrate prior to electrochemically depositing copper. Such seed layers may be applied by a variety of methods, such as physical vapor deposition (“PVD”) and chemical vapor deposition (“CVD”). Typically, seed layers are thin in comparison to other metal layers, such as from 50 to 1500 angstroms thick.
U.S. Pat. No. 5,824,599 (Schacham-Diarnand et al.) discloses a method of preventing oxide formation on the surface of a copper seed layer by conformally blanket depositing under vacuum a catalytic copper layer over a barrier layer on a wafer and then, without breaking the vacuum, depositing a protective aluminum layer over the catalytic copper layer. Such blanket deposition of a copper layer under vacuum is typical of such procedures used commercially.
PCT patent application number WO 99/47731 (Chen) discloses a method of providing a seed layer by first vapor depositing an ultra-thin seed layer followed by electrochemically enhancing the ultra-thin seed layer to form final a seed layer. The copper seed layer is enhanced by using an alkaline electrolytic bath. According to this patent application, such a two step process provides a seed layer having reduced discontinuities, i.e. areas in the seed layer where coverage of the seed layer is incomplete or lacking. However, one using this method to enhance a seed layer would have to rinse and neutralize the seed layer before using conventional acidic electrolytic plating baths. In addition, a manufacturer using such alkaline enhancement method in combination with an acid electroplating bath would have to double the number of plating heads on the plating tool or throughput would decrease.
European Patent Application EP 952 242 A1 (Landau et al.) discloses low acid (≦0.4 M) and high copper (>0.8 M) containing electroplating baths for void-free filling of small recessed features. Repair of seed layers is not disclosed.
Thus, there is a continuing need for methods of repairing seed layers having oxidation and discontinuities, particularly for use in devices having small geometries, such as 0.5 micron and below.
SUMMARY OF THE INVENTION
It has been surprisingly found that acidic electroplating solutions may be used to repair copper seed layer by providing seed layers substantially free of discontinuities prior to subsequent metallization.
In one aspect, the present invention provides a method of providing a metal seed layer substantially free of discontinuities disposed on a substrate including the steps of contacting a metal seed layer disposed on a substrate with an electroplating bath including one or more sources of copper ions and an electrolyte, wherein the copper ions are present in an amount up to 10 g/L.
In a second aspect, the present invention provides a method of manufacturing an electronic device including the step of contacting a metal seed layer disposed on a substrate with an electroplating bath including one or more sources of copper ions and an electrolyte, wherein the copper ions are present in an amount up to 10 g/L.
In a third aspect, the present invention provides an electroplating bath including one or more sources of copper ion and an electrolyte, wherein the copper ions are present in an amount of up to 10 g/L.
In a fourth aspect, the present invention provides an article of manufacture including an electronic device substrate containing one or more apertures, each aperture containing a seed layer deposit obtained from an electroplating composition that includes one or more sources of copper ion and an electrolyte, wherein the copper ions are present in an amount of up to 10 g/L.
In a fifth aspect, the present invention provides a method for removing excess material from a semiconductor wafer containing one or more apertures by using a chemical mechanical planarization process which includes contacting the semiconductor wafer with a rotating polishing pad thereby removing the excess material from the semiconductor wafer; wherein the apertures contain a seed layer deposit obtained from an electroplating composition that includes one or more sources of copper ion and an electrolyte, wherein the copper ions are present in an amount of up to 10 g/L.
REFERENCES:
patent: 5004525 (1991-04-01), Bernards et al.
patent: 5328589 (1994-07-01), Martin
patent: 6277263 (2001-08-01), Chen
patent: 6354916 (2002-03-01), Uzoh et al.
Bayes Martin W.
Lefebvre Mark
Merricks David
Morrissey Denis
Shelnut James G.
Cairns S. Matthew
Parsons Thomas H.
Ryan Patrick
Shipley Company L.L.C.
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