Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Depositing predominantly single metal or alloy coating on...
Reexamination Certificate
2001-10-17
2004-11-30
King, Roy (Department: 1742)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Depositing predominantly single metal or alloy coating on...
C205S123000, C205S191000, C205S291000, C205S916000, C427S096400, C427S305000, C427S437000, C427S443100, C438S622000, C438S627000, C438S678000, C438S687000
Reexamination Certificate
active
06824665
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the to the field of seed layers for subsequent metallization. In particular, this invention relates to methods for depositing seed layers prior to metallization.
The trend toward smaller microelectronic devices, such as those with sub-micron geometries, has resulted in devices with multiple metallization layers to handle the higher densities. One common metal used for forming metal lines, also referred to as wiring, on a semiconductor wafer is aluminum. Aluminum has the advantage of being relatively inexpensive, having low resistivity, and being relatively easy to etch. Aluminum has also been used to form interconnections in vias to connect the different metal layers. However, as the size of via/contact holes shrinks to the sub-micron region, a step coverage problem appears which in turn can cause reliability problems when using aluminum to form the interconnections between the different metal layers. Such poor step coverage results in high current density and enhances electromigration.
One approach to providing improved interconnection paths in the vias is to form completely filled plugs by using metals such as tungsten while using aluminum for the metal layers. However, tungsten processes are expensive and complicated, tungsten has high resistivity, and tungsten plugs are susceptible to voids and form poor interfaces with the wiring layers.
Copper has been proposed as a replacement material for interconnect metallizations. Copper has the advantages of improved electrical properties as compared to tungsten and better electromigration property and lower resistivity than aluminum. The drawbacks to copper are that it is more difficult to etch as compared to aluminum and tungsten and it has a tendency to migrate into the dielectric layer, such as silicon dioxide. To prevent such migration, a barrier layer, such as titanium nitride, tantalum nitride and the like, must be used prior to the depositing of a copper layer.
Typical techniques for applying a metal layer, such as electrochemical deposition, are only suitable for applying copper to an electrically conductive layer. Thus, an underlying conductive seed layer, typically a metal seed layer such as copper, is generally applied to the substrate prior to electrochemically depositing copper. Such seed layers may be applied by a variety of methods, such as physical vapor deposition (“PVD”) and chemical vapor deposition (“CVD”). Typically, seed layers are thin in comparison to other metal layers, such as from 50 to 1500 angstroms thick. Such metal seed layers, particularly copper seed layers, may suffer from problems such as metal oxide both on the surface of the seed layer and in the bulk of the layer as well as discontinuities in the layer.
Discontinuities or voids are areas in the seed layer where coverage of the metal, such as copper, is incomplete or lacking. Such discontinuities can arise from insufficient blanket deposition of the metal layer, such as depositing the metal in a line of sight fashion. In order for a complete metal layer to be electrochemically deposited on such a seed layer, the discontinuities must be filled in prior to or during the deposition of the final metal layer, or else voids in the final metal layer may occur. For example, PCT patent application number WO 99/47731 (Chen) discloses a method of providing a seed layer by first vapor depositing an ultra-thin seed layer followed by electrochemically enhancing the ultra-thin seed layer to form a final seed layer. According to this patent application, such a two step process provides a seed layer having reduced discontinuities, i.e. areas in the seed layer where coverage of the seed layer is incomplete or lacking.
Physical or chemical vapor deposition methods are complicated and difficult to control. Further, PVD methods tend to deposit metal in a line of sight fashion. Electroless deposition, unlike PVD or CVD, tends to be more conformal, thus providing better aperture sidewall coverage leading to a more continuous seed layer and, consequently, reduced void formation following subsequent electroplating.
There is a need for methods of depositing substantially continuous seed layers that conform to surface geometries in electronic devices, particularly in devices having very small geometries such as 0.5 micron and below.
SUMMARY OF THE INVENTION
It has been surprisingly found that a substantially continuous seed layer can be deposited in one step according to the present method. Such method provides substantially continuous seed layers that conform to the surface geometries of the substrate, particularly on substrates having apertures ≦1 &mgr;m.
In one aspect, the present invention provides a method for depositing a seed layer including the steps of: contacting a substrate having a conductive layer and apertures of ≦1 &mgr;m with an electroless copper plating bath; subjecting the substrate to a low current density for a period of time to initiate plating of copper on the conductive layer; discontinuing the current; and continuing to plate electrolessly to provide a copper seed layer.
In a second aspect, the present invention provides a method for manufacturing an electronic device including the step of providing a copper seed layer including the steps of: contacting an electronic device substrate having a conductive layer and apertures of ≦1 &mgr;m with an electroless copper plating bath; subjecting the electronic device substrate to a low current density for a period of time to initiate plating of copper on the conductive layer; discontinuing the current; and continuing to plate electrolessly to provide the copper seed layer.
In a third aspect, the present invention provides a method of enhancing a discontinuous seed layer disposed on a substrate including the steps of: contacting a substrate having a discontinuous seed layer with an electroless copper plating bath; subjecting the substrate to a low current density for a period of time to initiate plating of copper on the conductive layer; discontinuing the current; and continuing to plate electrolessly to provide a substantially continuous seed layer.
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Frederick A. Lowenheim, Electroplating, McGraw-Hill Book Company, New York, 1978, pp 16-25.
Dutkewych Oleh B.
Merricks David
Shelnut James G.
Shipley Charles R.
Cairns S. Matthew
King Roy
Leader William T.
Shipley Company L.L.C.
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