Seed layer

Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Forming nonelectrolytic coating before depositing...

Reexamination Certificate

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Details

C205S184000, C205S210000, C205S157000

Reexamination Certificate

active

06660154

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to the field of seed layers for subsequent metallization. In particular, this invention relates to methods for repairing seed layers prior to metallization.
The trend toward smaller microelectronic devices, such as those with sub-micron geometries, has resulted in devices with multiple metallization layers to handle the higher densities. One common metal used for forming metal lines, also referred to as wiring, on a semiconductor wafer is aluminum. Aluminum has the advantage of being relatively inexpensive, having low resistivity, and being relatively easy to etch. Aluminum has also been used to form interconnections in vias to connect the different metal layers. However, as the size of via/contact holes shrinks to the sub-micron region, a step coverage problem appears which in turn can cause reliability problems when using aluminum to form the interconnections between the different metal layers. Such poor step coverage results in high current density and enhances electromigration.
One approach to providing improved interconnection paths in the vias is to form completely filled plugs by using metals such as tungsten while using aluminum for the metal layers. However, tungsten processes are expensive and complicated, tungsten has high resistivity, and tungsten plugs are susceptible to voids and form poor interfaces with the wiring layers.
Copper has been proposed as a replacement material for interconnect metallizations in the manufacture of integrated circuits. Copper has the advantages of improved electrical properties as compared to tungsten and better electromigration property and lower resistivity than aluminum. The drawbacks to copper are that it is more difficult to etch as compared to aluminum and tungsten and it has a tendency to migrate into the dielectric layer, such as silicon dioxide. To prevent such migration, a barrier layer, such as titanium nitride, tantalum nitride and the like, must be used prior to the depositing of a copper layer.
Typical techniques for applying a metal layer, such as electrochemical deposition, are only suitable for applying copper to an electrically conductive layer. Thus, an underlying conductive seed layer, typically a metal seed layer such as copper, is generally applied to the substrate prior to electrochemically depositing copper. Such seed layers may be applied by a variety of methods, such as physical vapor deposition (“PVD”) and chemical vapor deposition (“CVD”). Typically, seed layers are thin in comparison to other metal layers, such as from 50 to 1500 angstroms thick. Such metal seed layers, particularly copper seed layers, may suffer from problems such as metal oxide both on the surface of the seed layer and in the bulk of the layer as well as discontinuities in the layer.
Discontinuities or voids are areas in the seed layer where coverage of the metal, such as copper, is incomplete or lacking. Such discontinuities can arise from insufficient blanket deposition of the metal layer, such as depositing the metal in a line of sight fashion. In order for a complete metal layer to be electrochemically deposited on such a seed layer, the discontinuities must be filled in prior to or during the deposition of the final metal layer, or else voids in the final metal layer may occur.
PCT patent application number WO 99/47731 (Chen) discloses a method of providing a seed layer by first vapor depositing an ultra-thin seed layer followed by electrochemically enhancing the ultra-thin seed layer to form a final seed layer. According to this patent application, such a two step process provides a seed layer having reduced discontinuities, i.e. areas in the seed layer where coverage of the seed layer is incomplete or lacking. Conventional bottom-up or superfill copper electroplating baths are acid copper baths. Thus, one wishing to repair seed layer discontinuities using this approach with a conventional copper plating bath would need two electrolytic baths, an alkaline enhancing bath and an acidic copper electroplating bath. Thorough rinsing and neutralization of the seed layer before using conventional acidic electrolytic plating baths is required. In addition, a manufacturer using such alkaline enhancement method in combination with an acid electroplating bath would have to double the number of plating heads on the plating tool or throughput would decrease.
Colloidal copper has been used as a catalyst for electroless metal plating, particularly electroless copper plating. For example, U.S. Pat. Nos. 4,762,560 and 4,681,630 (Brasch) disclose colloidal copper containing small amounts of ionizable palladium as a catalyst for electroless copper baths, particularly slow electroless copper baths. Such catalyst is not disclosed for use in integrated circuit manufacture.
There is a continuing need for methods of repairing discontinuous seed layers without using a second electroplating bath. Such methods are particularly needed for plating of devices having very small geometries, such as 0.5 micron and below.
SUMMARY OF THE INVENTION
It has been surprisingly found that discontinuous metal seed layers may be repaired or enhanced according to the present invention without the use of an alkaline electroplating bath to provide metal seed layers substantially free of discontinuities.
In one aspect, the present invention provides a method of enhancing a discontinuous metal seed layer disposed on a substrate including the steps of: contacting a metal seed layer disposed on a substrate with a copper colloid composition including a minor amount of ionizable palladium compound and a major amount of copper colloid particles to form a substantially continuous seed layer.
In a second aspect, the present invention provides a method of electrodepositing a metal layer on the surface of a seed layer including the steps of: contacting a metal seed layer disposed on a substrate with a copper colloid composition including a minor amount of ionizable palladium compound and a major amount of copper colloid particles to form a substantially continuous seed layer; and contacting the substrate with an electroplating solution including one or more metal ions and an electrolyte.
In a third aspect, the present invention provides a method of manufacturing an electronic device including the steps of: contacting a metal seed layer disposed on an electronic device substrate with a copper colloid composition including a minor amount of ionizable palladium compound and a major amount of copper colloid particles to form a substantially continuous seed layer; and contacting the substrate with an electroplating solution including one or more metal ions and an electrolyte.
DETAILED DESCRIPTION OF THE INVENTION
As used throughout the specification, the following abbreviations shall have the following meanings, unless the context clearly indicates otherwise: nm=nanometers; g/L=grams per liter; &mgr;m=micron=micrometer; ASF=amperes per square foot; M=molar; and ppm=parts per million.
As used throughout the specification, “feature” refers to the geometries on a substrate, such as, but not limited to, trenches and vias. “Apertures” refer to recessed features, such as vias and trenches. The term “small features” refers to features that are one micron or smaller in size. “Very small features” refers to features that are one-half micron or smaller in size. Likewise, “small apertures” refer to apertures that are one micron or smaller (≦1 &mgr;m) in size and “very small apertures” refer to apertures that are one-half micron or smaller (≦0.5 &mgr;m) in size. As used throughout this specification, the term “plating” refers to metal electroplating, unless the context clearly indicates otherwise. “Deposition” and “plating” are used interchangeably throughout this specification. The term “accelerator” refers to a compound that enhances the plating rate. The term “suppressor” refers to a compound that suppresses the plating rate. “Halide” refers to fluoride, chloride, bromide, and iodide.
A

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