Security mapping and auto reconfiguration

Optical communications – Diagnostic testing

Reexamination Certificate

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C398S010000, C398S002000, C398S057000

Reexamination Certificate

active

06788895

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
This invention relates to semiconductor photo transceiver arrays with silicon circuitry permitting selectable routing of detectors to emitters, and to methods for routing and mapping data channels in opto-electronic semiconductor devices; and in particular to methods for routing, mapping, rerouting and re-mapping internal and optical inter-connections in multi-array semiconductor devices and systems.
2. Background Art
The technology associated with electronics has evolved extremely rapidly over the last 40 years. Computers and related peripheral equipment, satellite and communication systems are becoming ever more sophisticated and powerful. However, data transfer into and out of processors remains a gating capability. The combination of increased parallelism and optics is the focus of optical interconnect technology.
One approach to optical interconnect technology uses so-called flip-chip techniques where the advantages of silicon process technology are combined with the optical properties of III-V semiconductor materials. Results to date indicate that this combination will lead to orders of magnitude increases in data transfer rates. These successes suggest that there will be enormous benefits to resolving the remaining issues associated with this technology.
Prior art
FIG. 1
shows an example of so-called flip-chip technology that has been developed to exploit the advantages of CMOS substrates for some aspects of data transfer, and the optical advantages of III-V semiconductors. In this technology, emitter-detector arrays are fabricated separately from a CMOS substrate. The emitter-detector arrays are then inverted, aligned with the CMOS substrates, and secured in place using solder balls or bumps to form electrical contacts with modest mechanical adhesion properties, and using epoxy to rigidly mount the emitter-detector array to the CMOS chip. In
FIG. 1
, for clarity only a single pair of fiber optic cables is shown.
The separate arrays of detectors and emitters are interconnected by some suitable light carrying media, such as bundles of fiber optic cables. The alignment between the ends the these bundles, or other media, and the arrays causes errors in mapping of the elements of one array with the elements of another array.
With whatever method one uses to connect one array of transmitters to an array of receivers, or one array of transceivers to another array of transceivers, alignment is an issue. In other words, what is needed is a way to determine that the arrays are aligned to produce a useful device.
Assembly processes are imperfect, so there will be some misalignment, even if the effect on the performance of the system is negligible. In a production environment the effect of small amounts of misalignment will decrease yield, which costs money in terms of lost revenue.
Prior art
FIG. 2
shows a schematic representation of the effect of misalignment. The darker squares represent light from fibers coupled to the transceivers in a remote array, and the lighter squares represent the transceivers in the present array. In
FIG. 2A
there is some degradation of coupling, but a one-to-one correspondence between transceivers remains. However, in
FIG. 2B
, some of the light fibers overlap more than one transceiver, while others fail to overlap any transceivers. In general, the types of misalignment include rotation, linear displacement, scaling, and a combination of these three basic types of misalignment. What is needed is a way to increase the tolerance to slight misalignment of transceiver arrays when coupling arrays.
Connecting nodes requires the use of fiber bundles or some other point-to-point connection means. However, there will still be some amount of misalignment, which can cause system communication failures. What is needed is a way to increase the tolerance to slight misalignment of transceiver arrays when coupling nodes.
There would be only minimal utility to opto-electronic devices such as the ones shown in
FIG. 1
, if one array could be connected on only one other array. What is needed is a way to couple more than one array together.
If there is some misalignment between two transceivers, there will be an effect on other transceivers in other nodes. What is needed is a way to determine how the transceiver arrays are aligned in a ring or other network architecture so that channels can be assigned and correct data transfers between nodes in a network can occur.
In some applications, security of data transfer is critical. It is therefore very important to be able to ensure that data transfer is indeed secure. Therefore, what is needed is a way to increase the security with which data is transmitted from node to node.
Though small numbers of transceiver arrays consume modest amounts of power, large arrays consume copious quantities of power, and in so doing generate a lot of heat. Removing such large amounts of thermal energy is very challenging, but if the thermal load is not controlled the device may degrade prematurely. What is needed is a way to reduce the power consumed by a node.
Prior art that may provide useful context for the reader, includes the following:
U.S. Pat. No. 5,761,350, “Method and apparatus for providing a seamless electrical/optical multilayer micro-opto-electro-mechanical system assembly”, illustrates how opto-electronic interconnections can provide a practical solution to communications bottleneck problems when combining a multitude of information processing units to perform a function. As research activities progress in the field of serial or parallel board-to-board and module-to-module interconnections, some of the research focus has shifted to smaller physical dimensions, such as intra-module interconnections, which combines opto-electronic interconnections, multi-chip module packaging, and micro-electromechanical systems (MEMS) technologies at the module level. This disclosure presents integrated optical input/output (I/O) couplers on multi-chip modules (MCMs) using micro-machined silicon mirrors that are used with opto-electronic multi-chip modules (OE-MCMs). It uses microstructures that integrate optical wave guide networks, multi-layer electrical transmission line networks, micro-machined silicon mirrors, and C4-bonded photonic devices into a single structure. Using both sides of the silicon wafers, multiple metal layers and optical waveguide layers are fabricated for all types of metal or optical waveguide materials. The input/output coupling arrangement utilizes a combination of micro-machined silicon mirrors and through-holes across OE-MCM, integrated together into a single package.
U.S. Pat. No. 5,625,734, “Opto-electronic interconnect device and method of making”, describes a waveguide having a core region and a cladding region. A portion of the cladding region forms a first surface and portions of both the core region and the cladding region form an end surface. There is an insulative flexible substrate having an electrically conductive tracing with a first portion and a second portion, wherein the first portion of the insulative flexible substrate is mounted on the end surface of the waveguide.
U.S. Pat. No. 5,428,704, “Opto-electronic interface and method of making”, describes an interconnect substrate having a surface with electrical tracings. There is a photonic device with a working portion and a contact electrically coupled to one of the electrical tracings disposed oil the interconnect substrate. A molded optical portion encapsulates the photonic device, forming a surface. The surface passes light between the photonic device and an optical fiber. Alignment of the optical fiber is achieved by an alignment apparatus that is formed in the molded optical portion.
U.S. Pat. No. 5,420,954, “Parallel optical interconnect”, describes an optical interconnect that couples multiple optical fibers to an array of opto-electronic devices. The interconnect includes a multiple optical fiber connector and an opto-electronic board. The multiple fiber connector can be me

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