Secured method for loading a plurality of applications into a mi

Cryptography – Particular algorithmic function encoding – Nbs/des algorithm

Patent

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Details

235380, 902 2, H04L 932, G07F 710

Patent

active

054736900

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
The present invention has been made in collaboration with the Universite des Sciences et Techniques, and the CERIM and LIFL laboratories. Its object is a secured method for the loading of several applications in a memory card provided with a microprocessor, often called a chip card. Chip cards such as these typically have three types of use. In a first use of identification, they constitute keys by which their bearer can gain access to a place or a service. In a monetary use, either they are pre-loaded with units representing a possibility of consumption with a party that issues chip cards (generally in telecommunications) or the information that they contain represents a balance of a bank account. As a last type of use, data storage may be noted: for example in order to manage health matters, each individual is provided with a card in which his medical history may be recorded, or again the card may replace an identity card.
The present card seeks to enable the coexistence, on a same card, of these different uses without its being possible for the use of the card that is made for one application to hamper the use of the card for other applications. To this end, the invention procures a safe method for the loading of the different applications so that they cannot interfere with each other. The invention covers also the facility of structuring attached to an application and the interrogation of the data elements by application. Furthermore, the system can be used to make it possible for the applications to permit certain data to to be "seen" by certain applications in total confidentiality.
2. Discussion of the Related Art
A first mode of managing several applications in one and the same card is known. It shall be described here below and it shall be shown that, despite its performance characteristics, this known loading method comes up against certain limitations. The method of the invention will show these limitations can be overcome.
FIG. 1 exemplifies a sharing of the memory of a chip card that can suit several applications. A memory of a chip card such as this is, in this case, physically divided into two essential parts. A first description part 1 contains descriptors, a second part 2 comprising pure memorizing zones. A descriptor represents an application. It comprises a certain number of bytes in binary language. A first byte 3 is called an identifier byte. It enables the application to be designated. If, at the time of a transaction with the card, a secret code and the identification of the application are presented, immediately the descriptor for which the identifier corresponds to the secret code presented is reached.
A descriptor also comprises a protection element 4 after the identifier. A first byte of this protection element 4 relates to the protection, in reading mode, of the words of the memory, another byte relates to the protection in writing mode, a third and fourth byte relate to the erasure or updating if, furthermore, the technology (EEPROMs) of the card allows it. It could be assumed, for example, that these information elements are encoded on one bit of the protection byte: when it is equal to zero, it prevents action whereas it permits it if it is equal to one. Similarly, in writing mode, it could be assumed that third bit (or another bit) of the second protection byte prohibits the writing if its value is zero or, on the contrary, permits it if its value is one (or possibly the contrary). This is also the case for the erasure or the updating.
As the last essential part, a descriptor finally comprises a number 5 of the memory words used by the concerned application. This number is encoded, for example, on two bytes after the codes of the protection element 4. An application concerned by a descriptor may thus contain a number of memory words equal to any number, for example 18. To know where the words of the memory are located, in the part 2 of this memory, which corresponds to this application, an instruction of the microprocess

REFERENCES:
patent: 4829169 (1989-05-01), Watanabe
patent: 4849614 (1989-07-01), Watanabe et al.
patent: 4928001 (1990-05-01), Masada
patent: 4985615 (1991-01-01), Iijima
patent: 5161256 (1992-11-01), Iijima

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