Static information storage and retrieval – Floating gate – Data security
Patent
1995-04-27
1996-11-19
Nelms, David C.
Static information storage and retrieval
Floating gate
Data security
36518512, 257316, 257922, G11C 1602, H01L 29788
Patent
active
055769888
ABSTRACT:
An improved EEPROM structure is disclosed which provides protection against external detection of data stored within the array's memory cells via microprobing by causing the array's word lines to de-activate upon an attempted deprocessing of the array. An EEPROM "protect" cell is connected in parallel between each word line within the array and ground potential. Each of these protect cells has formed therein one or more substantially vertical cavities filled with a high etching film. These cavities are provided in a region adjacent to an end of the protect cell's floating gate such that during an attempted deprocessing of the array using an etching process in order to expose the array's word, bit, and control lines for microprobing, the etchant will rapidly diffuse through these cavities, exposing and discharging the floating gate before fully exposing the word, bit, and control lines. Once discharged, each protect cell shorts its associated word line to ground potential. Holding the word lines at ground potential in such a manner precludes the activation of the word lines and, therefore, effectively prevents the external reading of data stored within the array via microprobing.
REFERENCES:
patent: 4953129 (1990-08-01), Kobayashi
patent: 4962484 (1990-10-01), Takeshima
patent: 5132928 (1992-07-01), Hayashikoshi
patent: 5291434 (1994-03-01), Kowalski
Jaffe James M.
Kuo Max C.
Mai Son
National Semiconductor Corporation
Nelms David C.
Paradice William L.
Winters Paul J.
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