Secure fast packet switch having improved memory utilization

Details Secure fast packet switch having improved memory utilization Secure fast packet switch having improved memory utilization

1996-09-27

2000-08-08

Pham, Chi H.

Multiplex communications

Network configuration determination

Using a particular learning algorithm or technique

370392, 370400, H04L 1256, H04L 1228

Patent

active

061011703

ABSTRACT:
In a secure fast packet switch having a plurality of input ports and a plurality of output ports, a method of determining which port in the plurality of output ports data that is received on one input port in the plurality of input ports is to be sent to, the method including the steps of determining a physical layer address of a sending node, determining a physical layer address of a receiving node, determining an input port in the plurality of input ports that the data was received on, determining if the physical layer address of the sending node and the physical layer address of the receiving node are an allowed combination, determining the magnitude of the node identification number of the sending node, determining the magnitude of the node identification number of the receiving node, obtaining outbound port information from a first predetermined location in a data structure stored in a memory if the node identification number of the sending node is greater than the node identification number of the receiving node, and obtaining outbound port information from a second predetermined location in the data structure stored in the memory if the node identification number of the sending node is less than the node identification number of the receiving node. Circuitry that carries out the method is also described along with an exemplary data structure.

REFERENCES:
patent: 5150464 (1992-09-01), Sidhu et al.
patent: 5400323 (1995-03-01), Frenzel, III et al.
patent: 5452296 (1995-09-01), Shimizu
patent: 5485455 (1996-01-01), Dobbins et al.
patent: 5544161 (1996-08-01), Bigham et al.

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