Sectored flash memory comprising means for controlling and...

Details Sectored flash memory comprising means for controlling and... Sectored flash memory comprising means for controlling and...

2005-11-15

2005-11-15

Lam, David (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S236000, C365S185330

Reexamination Certificate

active

06965526

ABSTRACT:
The present invention relates to a method for controlling and for refreshing memory cells in an electrically erasable and programmable memory comprising a memory array organized in sectors, each sector comprising memory cells linked to bit lines and to word lines. The method comprises controlling and refreshing memory cells of pages of the memory array the address of which is indicated by a control and refresh counter comprising data forming tokens usable once. According to the present invention, a control and refresh counter is integrated into each sector of the memory and comprises memory cells linked to the bit lines of the sector. A counter of a sector is erased after reaching a maximum counting value that is chosen so that, when this maximum counting value is reached, memory cells of the counter have undergone a number of electrical stress cycles that is at the most equal to a determined number. Application to Flash memories.

REFERENCES:
patent: 5386533 (1995-01-01), Morris
patent: 6005810 (1999-12-01), Wu
patent: 6345001 (2002-02-01), Mokhlesi
patent: 1 233 421 (2002-08-01), None
patent: 2 810 152 (2001-12-01), None
patent: 2 816 751 (2002-05-01), None

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