Second order digital filter requiring only one sigma delta...

Details Second order digital filter requiring only one sigma delta... Second order digital filter requiring only one sigma delta...

1999-04-26

2001-05-15

Tokar, Michael (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S118000, C341S120000

Reexamination Certificate

active

06232900

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to digital filtering. More particularly, it relates to the design of an efficient sigma delta gain/scaler performing second order filtering with only one sigma delta modulator.
Single bit (i.e., 1-bit) analog-to-digital (A/D) converters which output a single bit value have become very popular, particularly in voice and audio circuit design applications. Single bit A/D converters allow analog circuitry to be relatively simple with high circuit tolerances. Sigma delta techniques are common single bit data processing techniques utilizing oversampling. Generally, oversampling is the digital sampling of an input signal at a much higher rate than a Nyquist minimum rate.
FIG. 1
shows an exemplary single bit A/D converter circuit including a 1-bit A/D converter
3002
, a digital decimation filter
3004
, and additional post filtering
3006
.
In particular, the single bit output of the 1-bit A/D converter
3002
is typically decimated by a digital decimation filter (or simply “decimator”)
3004
. The decimator
3004
is a type of digital filter which converts a single bit stream occurring at the high (i.e., oversampled) sampling rate into a multi-bit signal (e.g., m bit signal as shown in
FIG. 1
) occurring, e.g., at the Nyquist rate. Post processing of the low rate, high resolution multi-bit output signal can be performed by post filtering circuitry
3006
, e.g., using dedicated hardware filters or a programmable digital signal processor (DSP).
Applications exist in which it is more desirable to process the input signal at the oversampled rate than it is to decimate the single bit signal down to a lower rate, multi-bit signal and then perform post filter signal processing.
For example,
FIG. 2
shows a mixing of two separate single bit data streams
3108
,
3109
in, e.g., a sigma delta single bit mixer
3104
, before being digitized by an appropriate digital-to-analog (D/A) converter
3106
.
In particular, in
FIG. 2
, multiple single bit data streams
3108
,
3109
can be mixed together at an oversampled rate in a single bit mixer, e.g., in sigma delta mixer
3104
, with the single bit output of the sigma delta mixer
3104
representing a composite of the input single bit data streams
3108
,
3109
. It may then be desirable to convert this mixed, single bit output stream
3111
into an analog signal
3112
using an appropriate single bit digital-to-analog (D/A) converter
3106
.
FIG. 3
shows another application exemplifying the ability to do in-band filtering at an oversampled rate.
In particular, as shown in
FIG. 3
, early work in this field has shown that it is practical to implement 1
st
order filter transfer functions using sigma delta modulators. In this case, it has been shown that a 1
st
order filter function was implemented using a classical 2
nd
order modulator with a z
−1
delay. A 2
nd
order transfer function can be formed by cascading two 1
st
order systems, each comprising a sigma delta modulator with a delay of z
−1
.
Unfortunately, each sigma delta modulator requires a significant amount of area on an integrated circuit, increasing the size of the overall circuit for each 1
st
order block added.
Accordingly, there is a need for a more efficient construction for a 2
nd
order digital filter.
SUMMARY OF THE INVENTION
In accordance with the principles of the present invention, a single bit digital filter comprises a sigma delta modulator. A first 1
st
order feedback term is connected to an output of the sigma delta modulator. A delay element delays the first 1
st
order feedback term. A summer sums the delayed first 1
st
order feedback term with a signal being input to the sigma delta modulator.
A method of providing a 2
nd
or higher order single bit digital filter using only one sigma delta modulator in accordance with another aspect of the present invention comprises generating a modulated signal with one sigma delta modulator. A sample output from the sigma delta modulator is delayed for one filter cycle. The delayed sample output from the one sigma delta modulator is summed with an input signal to the sigma delta modulator. A 2
nd
order denominator portion of a transfer function is output by the one sigma delta modulator.


REFERENCES:
patent: 4943807 (1990-07-01), Early et al.
patent: 5392039 (1995-02-01), Thurston
patent: 5457456 (1995-10-01), Norsworthy
patent: 5757300 (1998-05-01), Koilpillai et al.
patent: 5896101 (1999-04-01), Melanson

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