Second-order adaptive differential microphone array

Electrical audio signal processing systems and devices – Directive circuits for microphones

Reexamination Certificate

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Details

C381S094600, C381S026000

Reexamination Certificate

active

06584203

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to microphone arrays that employ directionality characteristics to differentiate between sources of noise and desired sound sources.
2. Description of the Related Art
The presence of background noise accompanying all kinds of acoustic signal transmission is a ubiquitous problem. Speech signals especially suffer from incident background noise, which can make conversations in adverse acoustic environments virtually impossible without applying appropriately designed electroacoustic transducers and sophisticated signal processing. The utilization of conventional directional microphones with fixed directivity is a limited solution to this problem, because the undesired noise is often not fixed to a certain angle.
SUMMARY OF THE INVENTION
Embodiments of the present invention are directed to adaptive differential microphone arrays (ADMAs) that are able to adaptively track and attenuate possibly moving noise sources that are located in the back half plane of the array. This noise attenuation is achieved by adaptively placing a null into the noise source's direction of arrival. Such embodiments take advantage of the adaptive noise cancellation capabilities of differential microphone arrays in combination with digital signal processing. Whenever undesired noise sources are spatially non-stationary, conventional directional microphone technology has its limits in terms of interference suppression. Adaptive differential microphone arrays (ADMAs) with their null-steering capabilities promise better performance.
In one embodiment, the present invention is a second-order adaptive differential microphone array (ADMA), comprising (a) a first first-order element (e.g.,
802
of
FIG. 8
) configured to convert a received audio signal into a first electrical signal; (b) a second first-order element (e.g.,
804
of
FIG. 8
) configured to convert the received audio signal into a second electrical signal; (c) a first delay node (e.g.,
806
of
FIG. 8
) configured to delay the first electrical signal from the first first-order element to generate a delayed first electrical signal; (d) a second delay node (e.g.,
808
of
FIG. 8
) configured to delay the second electrical signal from the second first-order element to generate a delayed second electrical signal; (e) a first subtraction node (e.g.,
810
of
FIG. 8
) configured to generate a forward-facing cardioid signal based on a difference between the first electrical signal and the delayed second electrical signal; (f) a second subtraction node (e.g.,
812
of
FIG. 8
) configured to generate a backward-facing cardioid signal based on a difference between the second electrical signal and the delayed first electrical signal; (g) an amplifier (e.g.,
814
of
FIG. 8
) configured to amplify the backward-facing cardioid signal by a gain parameter to generate an amplified backward-facing cardioid signal; and (h) a third subtraction node (e.g.,
816
of
FIG. 8
) configured to generate a difference signal based on a difference between the forward-facing cardioid signal and the amplified backward-facing cardioid signal.
In another embodiment, the present invention is an apparatus for processing signals generated by a microphone array (ADMA) having (i) a first first-order element (e.g.,
802
of
FIG. 8
) configured to convert a received audio signal into a first electrical signal and (ii) a second first-order element (e.g.,
804
of
FIG. 8
) configured to convert the received audio signal into a second electrical signal, the apparatus comprising (a) a first delay node (e.g.,
806
of
FIG. 8
) configured to delay the first electrical signal from the first first-order element to generate a delayed first electrical signal; (b) a second delay node (e.g.,
808
of
FIG. 8
) configured to delay the second electrical signal from the second first-order element to generate a delayed second electrical signal; (c) a first subtraction node (e.g.,
810
of
FIG. 8
) configured to generate a forward-facing cardioid signal based on a difference between the first electrical signal and the delayed second electrical signal; (d) a second subtraction node (e.g.,
812
of
FIG. 8
) configured to generate a backward-facing cardioid signal based on a difference between the second electrical signal and the delayed first electrical signal; (e) an amplifier (e.g.,
814
of
FIG. 8
) configured to amplify the backward-facing cardioid signal by a gain parameter to generate an amplified backward-facing cardioid signal; and (g) a third subtraction node (e.g.,
816
of
FIG. 8
) configured to generate a difference signal based on a difference between the forward-facing cardioid signal and the amplified backward-facing cardioid signal.


REFERENCES:
patent: 4006310 (1977-02-01), Bayer
patent: 5473701 (1995-12-01), Cezanne et al.
patent: 5586191 (1996-12-01), Elko et al.
patent: 5740256 (1998-04-01), Castello Da Costa et al.

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