Second nearest-neighbor communication network for synchronous ve

Details Second nearest-neighbor communication network for synchronous ve Second nearest-neighbor communication network for synchronous ve

1989-10-13

1992-11-10

Chan, Eddie P.

Boots, shoes, and leggings

364DIG1, 36423221, 3642319, 36493101, 36493141, 36493151, 36494061, G06F 1300, G06F 1356, G06F 15347

Patent

active

051631202

ABSTRACT:
A synchronous vector processor SVP device having a plurality of one-bit processor elements organized in a linear array. The processor elements are all controlled in common by a sequencer, a state machine or a control circuit (controller) to enable operation as a parallel processing device. Each processor element includes a set of input registers, two sets of register files, a set of working registers, an arithmetic logic unit including a one-bit full adder/subtractor, and a set of output registers. In video applications each processor element operates on one pixel of a horizontal scan line and is capable of real-time digital processing of video signals. The SVP includes interconnecting circuitry enabling the individual processor elements to retrieve data from and transmit data to their first and second nearest neighbors on either side. At the chip level external connections are provided to enable cascading of several SVP devices.

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