Amplifiers – With semiconductor amplifying device – Including frequency-responsive means in the signal...
Reexamination Certificate
2000-01-04
2001-05-22
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including frequency-responsive means in the signal...
C330S306000
Reexamination Certificate
active
06236274
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to dual-band RF (Radio Frequency) power amplifiers. More particularly, this invention relates to high efficiency RF power amplifiers having a switching circuit, which creates a low impedance at the second harmonic of each frequency band, for dual-band operation.
2. Description of the Related Art
In portable wireless communication systems, there is a strong need for power amplifiers with high efficiency to maximize the amount of talk time obtained from a power source, such as a battery. It is well known in the art of RF power amplifiers to consider both the fundamental frequency, and harmonic components of the fundamental frequency, for increasing the efficiency to an optimal level. In addition to obtaining impedance matching at the fundamental frequency, the efficiency is increased by conditions that provide zero impedance for even multiples (even harmonics) of the fundamental frequency. The following background documents are incorporated by reference herein in their entireties:
[1] D. M. Snider,” A Theoretical Analysis and Experimental Confirmation of the Optimally Loaded and Overdriven RF Power Amplifier,”
IEEE Tran, Electron Devices,
vol. ED-14, pp. 851-857, December 1967.
[2] J. E. Mitzlaff, “High Efficiency RF Power Amplifier,” U.S. Pat. No. 4,717,884, January 1988.
[3] M. A. Khatibzadeh, “Monolithically Realizable Harmonic Trapping Circuit,” U.S. Pat. No. 5,095,285, March 1992.
[4] N. Furutani, et al., “High Efficiency RF Power Amplifier,” U.S. Pat. No. 5,159,287, October 1992.
[5] P. M. White, “Effect of Input Harmonic Terminations of High Efficiency Class-B and Class-F Operation of PHEMT Devices,”
IEEE MIT
-
S Dig
., pp. 1611-1614, 1998.
[6] M. Masahiro, et al., “Radio-Frequency Power Amplifier with Input Impedance Matching Circuit Based on Harmonic Wave,” U.S. Pat. No. 5,592,122, January 1997.
[7] A. Adar, “Multiple-Band Amplifier,” U.S. Pat. No. 5,774,017, June 1998.
A Class F amplifier is well known as a device which operates primarily as a switch. For this reason, the power dissipation is lower and the stage efficiency is higher than for other amplifiers. Class F operation is characterized by limiting the voltage across the active device to approximately twice the supply voltage [reference 2]. Class F power amplifiers are a most popular design because they are known for high efficiency, wherein the impedance at even harmonic frequencies at the transistor output (drain or collector) is set to a short-circuit (low impedance), and the impedance at the odd harmonic frequencies at the transistor output is set to an open-circuit (high 8 infinite impedance) [references 1-4]. The derivation of the harmonic impedance of a Class F amplifier [reference 1] is based on a Class B biasing operation. In Class B operation, the current flows for only 180° of the AC cycle, whereas in Class A operation, the transistor is active for 360° of the AC cycle for a linear reproduction of the input. When the amplifier is biased at a Class AB state (which is a hybrid between Class A and Class B operation, i.e. the bias voltage is chosen so that current flows for more than half of the cycle for higher efficiency than Class A but does not provide a linear reproduction like Class A), the impedance of the even harmonics is still zero, but the impedance of the odd harmonics is no longer infinite.
In addition, it is well known that second harmonic frequency termination is a dominant factor in improving the efficiency of a power amplifier. Furthermore, providing the second harmonic termination at the transistor input (gate or base), in addition to the transistor output, may improve the overall efficiency significantly [references 5, 6].
FIG. 1
shows a circuit diagram of a conventional single band high efficiency power amplifier. The even harmonic resonator
1
provides zero impedance for the second harmonic, and the input and output fundamental matching network
2
,
3
provides the prescribed load impedance at the fundamental frequency to Field Effect Transistor (FET)
4
. However, dual-band operation in portable units is becoming indispensable because of dual-band communication systems, such as GSM (Global System for Mobil Communications).
However, the conventional high efficiency power amplifier shown in
FIG. 1
can not provide dual-band operation. Although two single band power amplifiers, each of which operate at a specific frequency band, can be used in a dual-band handset (e.g., a telephone), a single dual-band amplifier provides instant reductions in the costs of manufacture and allows for a reduction in the size of the respective device, and saves power.
In addition, in the dual-band GSM system, the second harmonic of the cellular frequency band (around 900 MHz) is within the fundamental PCS (Personal Communications System) frequency band (around 1800 MHz). These frequency values indicate that a high efficiency GSM dual-band power amplifier should provide a low impedance at around 1800 MHz at the transistor output (or/and input) under cellular-band operation, and provide a prescribed impedance at around 1800 MHz and a low impedance at around 3600 MHz under PCS-band operation. Thus, there is a need for a single amplifier having dual-band capabilities that overcomes the problems of the prior art.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to develop a high efficiency RF power amplifier for dual-band application.
To this end, according to the present invention, there is provided a high efficiency dual-band RF power amplifier which comprises (1) a power transistor having an input and an output; (2) a dual-band input impedance matching circuit connected to the input of the power transistor for providing input impedance matching for the RF power amplifier at two desired fundamental frequency bands; (3) a dual-band output impedance matching circuit connected to the output of the power transistor for providing output impedance matching for the RF power amplifier at two desired fundamental frequency bands; and (4) a combined dual-band bias circuit and second harmonic frequency termination circuit connected to one or both of the output and the input of the power transistor for providing an RF choke at a fundamental wave frequency and for providing a low impedance at a second harmonic frequency with respect to the fundamental wave frequency of each band.
The dual-band bias circuit and harmonic frequency termination circuit can include a band select voltage terminal for receiving a band select voltage. The dual-band input impedance matching circuit can comprise a passive dual-band network. The dual-band input impedance matching circuit can comprise one of a duplexer and a switch for providing impedance matching at two frequency bands of dual-band operation. The dual-band output impedance matching circuit can comprise a passive dual-band network. The dual-band output impedance matching circuit can comprise one of a duplexer and a switch for providing impedance matching at two frequency bands of dual-band operation.
The combined dual-band bias circuit and second harmonic frequency termination circuit can comprise (a) a bias circuit comprising: a transmission line and a bypass capacitor; the transmission line having an electric length which is approximately {fraction (1/20)}
th
of the fundamental wave frequency; a first end of the transmission line being connected to a first bias terminal and the bypass capacitor; a second end of the transmission line being connected to the output terminal of the power transistor; and (b) a second harmonic frequency termination circuit connected to the bias circuit, the second harmonic frequency termination circuit comprising: a first series resonant circuit comprising a cascaded inductor and capacitor, the first series resonant circuit having a first end connected to the output terminal of the power transistor and a second end connected to
Choe Henry
Industrial Technology Research Institute
Pascal Robert
Stevens Davis Miller & Mosher LLP
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