Sealed structure and method of fabricating sealed structure...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With semiconductor element forming part

Reexamination Certificate

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C257S685000, C438S051000

Reexamination Certificate

active

07834438

ABSTRACT:
According to a sealed structure60constituted by anodically bonding a silicon board20and a glass plate40, an upper opening of a recessed portion22is sealed in an airtight state by the glass plate40by bonding an upper face of a wall portion26to the glass plate40. A voltage applying pattern70is formed to surround a light transmitting region to which an optical conversion element24is opposed. Further, the voltage applying pattern70functions as a cathode pattern applied with a voltage by being brought into contact with a lower face of the cathode plate50.

REFERENCES:
patent: 6144153 (2000-11-01), Nakatani
patent: 6172456 (2001-01-01), Cathey et al.
patent: 2004/0189185 (2004-09-01), Yotsuya
patent: 2008/0128839 (2008-06-01), Sotokawa
patent: 2005-166909 (2005-06-01), None
patent: 2005166909 (2005-06-01), None

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