Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate
2001-05-04
2004-05-18
Thai, Luan (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
C257S676000, C257S696000, C257S787000
Reexamination Certificate
active
06737733
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a sealed semiconductor device and a lead frame used for the sealed semiconductor device, particularly to a sealed semiconductor device holding the interval between an internal lead and a semiconductor chip almost constant and a lead frame used for the sealed semiconductor device.
2. Description of the Background Art
An LOC (Lead On Chip) semiconductor device is described below as an example of conventional sealed semiconductor device obtained by sealing a semiconductor chip with a resin. In the LOC semiconductor device, a pad is formed nearby the center of a semiconductor chip and an internal lead extending to the vicinity of the pad is provided. Therefore, the LOC semiconductor device has an advantage that a larger semiconductor chip can be mounted compared to a structure of bonding a wire to a lead located at the side face of the semiconductor chip.
As shown in
FIG. 28
, in the case of an LOC semiconductor device, a semiconductor chip
101
is fixed on a die pad
103
through a die pad material
104
. A lead
102
which includes an internal lead
102
a
extends to the vicinity of a pad (not illustrated) on the semiconductor chip
101
. The tip end of the internal lead
102
a
and the pad are wire-bonded by a gold wire
105
. Then, the semiconductor chip
101
and the internal lead
102
a
are sealed with a molded resin
106
.
In the case of this LOC semiconductor device, however, as shown in
FIG. 29
, when setting the semiconductor chip
101
and internal lead
102
a
in a mold and sealing them with the mold resin
106
, the semiconductor chip
101
maybe shifted toward the internal lead
102
a
due to the difference in flow resistance between a mold resin
106
a
flowing by the upper side of the semiconductor chip
101
and a mold resin
106
b
flowing by the lower side of the semiconductor chip
101
.
Therefore, the internal lead
102
a
and the surface of the semiconductor chip
101
are excessively close each other, the capacitance between them fluctuates, and thereby timing of an input signal and an output signal may be shifted.
As the LOC semiconductor device for preventing the internal lead
102
a
and the surface of the semiconductor chip
101
from being close each other when sealed by a mold resin, there is an LOC semiconductor device disclosed in Japanese Patent Laying-Open No. 6-169052. In the case of the LOC semiconductor device, an insulating layer
107
is formed between a semiconductor chip
101
and an internal lead
102
a
as shown in FIG.
30
.
The insulating layer
107
is continuously formed along the direction in which the internal leads
102
a
are arranged (direction almost orthogonal to the paper surface) so as to be present between every internal lead
102
a
and the semiconductor chip
101
. The gaps between each internal lead
102
a
and the insulating layer
107
and between the insulating layer
107
and the semiconductor chip
101
are fixed by an adhesive.
According to the LOC semiconductor device, the semiconductor chip
101
is not shifted toward the internal lead
102
a
when sealed by a mold resin because the insulating layer
107
is formed between the semiconductor chip
101
and the internal lead
102
a.
Thereby, fluctuation of the capacitance between the internal lead
102
a
and the surface of the semiconductor chip
101
because the leads are excessively close each other is prevented and it is possible to control the shift of timing between an input signal and an output signal.
However, the LOC semiconductor device disclosed in Japanese Patent Laying-Open No. 6-169052 has the following problem. In the case of this LOC semiconductor device, to bond the insulating material
107
with the semiconductor chip
101
, it is necessary to press the internal lead
102
a
against the semiconductor chip
101
from the upper side at an temperature of 150 to 200° C. or press the semiconductor chip
101
against the internal lead
102
a
from the upper side by vertically reversing the internal lead
102
a
and the semiconductor chip
101
.
Therefore, a production system for pressing the internal lead
102
a
or semiconductor chip
101
is necessary and thereby, the production cost may increase.
Moreover, though the insulating material
107
generally uses a resin film, the resin film generally has a high hygroscopicity. The moisture absorbed in the insulating material
107
is evaporated due to heat when mounting a semiconductor device sealed by the resin on a substrate. In this case, cracks may occur on the mold resin
106
.
Particularly, the insulating layer
107
absorbs much moisture because the layer
107
is continuously formed along the direction in which internal leads
102
a
are arranged (direction almost perpendicular to the paper surface) and has a comparatively large contact area with the internal leads
102
a
and semiconductor chip
101
. Therefore, when the moisture is evaporated, cracks tend to more easily occur in the mold resin
106
.
SUMMARY OF THE INVENTION
The present invention is made to solve the above problems, and it is an object of the present invention to provide a sealed semiconductor device capable of easily preventing an internal lead and a semiconductor chip from being excessively close each other without using any additional production system when the device is sealed by a mold resin and controlling cracks from being generated on the mold resin due to the heat when the device is set to a substrate and the like and it is another object to provide a lead frame used for the sealed semiconductor device.
A sealed semiconductor device according to an aspect of the present invention is a sealed semiconductor device having a semiconductor chip portion and a lead frame portion including an internal lead portion extending onto the surface of the semiconductor chip portion and moreover having a holding member for holding the semiconductor chip portion and the internal lead portion at a predetermined interval by being fixed to either of the semiconductor chip portion and internal lead portion and contacting the other without being fixed.
According to the above sealed semiconductor device, it is possible to comparatively easily prevent an internal lead portion and a semiconductor chip portion from excessively close together when sealed by a mold resin without using an additional system for fixing a holding member to the semiconductor chip portion and internal lead portion, compared to the case of a conventional sealed semiconductor device because the holding member is fixed to either of the semiconductor chip portion and internal lead portion and contacts the other without being fixed.
It is preferable that the above holding member includes a tape member bonded and fixed to the internal lead portion and particularly preferable that the tape member is set in areas around the semiconductor chip portion.
In this case, because the contact area between the tape member and semiconductor chip portion is greatly decreased compared to the case of a conventional sealed semiconductor device, the quantity of moisture to be absorbed by the tape member is also reduced. Thereby, it is possible to control cracks from being generated on a mold resin in accordance with evaporation of moisture.
It is preferable that the holding member includes a first protrusion protruding toward the semiconductor chip portion provided to the internal lead portion and particularly preferable that the first protrusion is formed by bending the internal lead portion.
In this case, it is possible to prevent the internal lead portion and semiconductor chip portion from being excessively close each other by bending the internal lead portion without using an additional member.
It is more preferable that the crest portion of an internal lead contacts the semiconductor chip portion because the lead is bent.
In this case, it is possible to control damages from occurring on the surface of the semiconductor chip.
Moreover, it is preferable that the internal lead portion includes an orig
Hirata Yoshihiro
Michii Kazunari
Misumi Kazuyuki
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