1990-05-10
1990-11-13
Jackson, Jr., Jerome
357 30, 357 84, 357 29, 357 65, H01L 2504
Patent
active
049705652
ABSTRACT:
A memory cell in an EPROM device which is totally sealed from ultraviolet light by a conductive cover without openings therein for leads to the cell's drain, source and gate. Electrical communication with the source is provided by direct contact with the conductive cover. Access to the drain and floating gate is provided by buried N+ implants, buried N+ layers or N-wells crossing underneath the sides of the cover. The memory cell has a single poly floating gate rather than a stacked floating gate/control gate combination. The buried N+ implant or N-well serves as the control gate and is capacitvely coupled to the floating gate via a thin oxide layer in a coupling area.
REFERENCES:
patent: 4019197 (1977-04-01), Lohstroh et al.
patent: 4519050 (1985-05-01), Folmsbee
patent: 4530074 (1985-07-01), Folmsbee
patent: 4758869 (1988-07-01), Eitan et al.
patent: 4764800 (1988-08-01), Sander
patent: 4805138 (1989-02-01), McElroy et al.
Hu James C.
Huang John Y.
Wu Tsung-Ching
Atmel Corporation
Jackson, Jr. Jerome
Schneck Thomas
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