Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2007-05-22
2007-05-22
Dinh, Son (Department: 2824)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S189011
Reexamination Certificate
active
10535783
ABSTRACT:
Typically, a bulk of the memory space utilized by an SOC (103) is located in cheaper off-chip memory devices such as Synchronous Dynamic Random Access Memory (SDRAM) memories (104). These memories provide a large capacity for data storage, at a relatively low cost. It is common for SOC devices to communicate with each other through these off-chip memory devices. Because of the large amount of data being processed on state of the art SOCs, the data bandwidth to and from the SDRAM memories is a critical source, which if improperly managed results in bottlenecks. Thus, a novel address mapping scheme, which has improved efficiency for two-dimensional memory transactions is proposed for mapping on-chip memory transactions. This novel mapping scheme aims to decrease these bottlenecks, by segmenting the data sequence into portions being smaller than the size of a row of a block of the SDRAM memories.
REFERENCES:
patent: 5831926 (1998-11-01), Lacey et al.
patent: 6223265 (2001-04-01), Kawasaki et al.
patent: 6347063 (2002-02-01), Dosaka et al.
patent: 2002/0054537 (2002-05-01), Pascucci
Dinh Son
NXP B.V.
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