Scrambling of the current signature of an integrated circuit

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C307S110000, C363S060000

Reexamination Certificate

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11349418

ABSTRACT:
A method and a circuit for scrambling the current signature of a load including at least one integrated circuit executing digital processings, including the step of, at least on the load ground side, combining a current absorbed by a first linear regulator with a current absorbed by at least one capacitive switched-mode circuit with one or several switched capacitances.

REFERENCES:
patent: 4502152 (1985-02-01), Sinclair
patent: 5262712 (1993-11-01), Klotzig et al.
patent: 6320770 (2001-11-01), Feuser
patent: 6507913 (2003-01-01), Shamir
patent: 6617832 (2003-09-01), Kobayashi
patent: 2003/0118190 (2003-06-01), Sedlak et al.
patent: 2006/0176032 (2006-08-01), Malherbe et al.
French Search Report from French Patent Application 05/50367, filed Feb. 8, 2005.
French Search Report from French Patent Application 05/50366, filed Feb. 8, 2005.

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