Schottky TTL integrated logic gate circuit with reduced speed po

Details Schottky TTL integrated logic gate circuit with reduced speed po Schottky TTL integrated logic gate circuit with reduced speed po

1983-01-13

1985-03-12

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307458, 307299A, 307567, H03K 19013, H03K 19088

Patent

active

045047448

ABSTRACT:
An inverter gate using advanced low power Schottky configuration is shown in which a feedback transistor is used to provide input pull up action. The transistor is a minimum area device that occupies less chip area than the elements that it replaces. It also conserves power so that the speed power product is reduced. The circuit further incorporates negative feedback associated with the input bias resistor whereby a smaller resistor can be employed without increasing supply current drain or input current.

REFERENCES:
patent: 3510685 (1970-05-01), Watanabe et al.
patent: 3751680 (1973-08-01), Hodges
patent: 4321490 (1982-03-01), Bechdolt
patent: 4415817 (1983-11-01), Fletcher

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