Patent
1987-06-18
1989-01-03
Carroll, J.
357 52, 357 54, 357 59, H01L 2948, H01L 2934, H01L 2904
Patent
active
047960698
ABSTRACT:
A method is disclosed for fabricating a small area, self aligned guard ring in a Schottky barrier diode. A vertically-walled hole is anisotropically etched completely through a dielectric layer on a silicon substrate. A layer of doped polycrystalline silicon is deposited over the apertured dielectric layer. The polycrystalline silicon is reactively ion etched away to leave only a lining about the perimeter of the hole in the dielectric layer. The structure is heated to diffuse the dopant from the lining into the substrate. Schottky diode metal is deposited on the substrate exposed through the lined aperture in the dielectric layer.
REFERENCES:
patent: T101201 (1981-11-01), Anantha et al.
patent: 3907617 (1975-09-01), Zwernemann
patent: 4209349 (1980-06-01), Ho et al.
S. U. Kim, "A Very Small Schottky Barrier Diode (SBD) with Self-Aligned Guard Ring for VLSI Applications",IEDM 1978, Proceeding IEEE, (Dec. 1979), pp. 49-53.
F. H. Gaensslen, "Nitride-Limited Schottky Barrier Diode Design", IBM Technical Disclosure Bulletin, vol. 22, (1980), pp. 3397-3398.
S. U. Kim, "Plasma-Deposited Refractory Metal-Nitride Schottky Barrier Diodes", IBM Technical Disclosure Bulletin, vol. 21, (1978), pp. 936-937.
C. G. Jambotkar et al, "Schottky Barrier Diode with Isolated Guard Ring", IBM Technical Disclosure Bulletin, vol. 20, (1978), pp. 3197-3198.
Anantha Narasipur G.
Bhatia Harsaran S.
Gaur Santosh P.
Mauer, IV John L.
Carroll J.
Coca T. Rao
International Business Machines - Corporation
Ross, III Otho B.
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