Schottky-barrier tunneling transistor

Details Schottky-barrier tunneling transistor Schottky-barrier tunneling transistor

2005-11-08

2005-11-08

Tran, Minh-Loan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Schottky barrier

C257S472000, C257S473000, C257S474000, C257S486000

Reexamination Certificate

active

06963121

ABSTRACT:
A three-terminal semiconductor transistor device comprises a base region formed by a semiconductor material of a first conductivity type at a first concentration, the base region being in contact with a first electrical terminal via a semiconductor material of the second conductivity type at a second concentration, wherein the second concentration is lower than the first concentration. The three-terminal semiconductor transistor device also includes a conductive emitter region in contact with the semiconductor base region, forming a first Schottky barrier junction at the interface of the conductive emitter region and the semiconductor base region. The conductive emitter region is in contact with a second electrical terminal. The three-terminal semiconductor transistor device further includes a conductive collector region in contact with the semiconductor base region, which forms a second Schottky barrier junction at the interface of the conductive collector region and the semiconductor base region. The conductive collector region is in contact with a third electrical terminal. The tunneling current through the first Schottky barrier junction or the second Schottky barrier junction is substantially controlled by the voltage of the semiconductor base region.

REFERENCES:
patent: 5040034 (1991-08-01), Murakami
patent: 5049955 (1991-09-01), Freeouf
patent: 5663584 (1997-09-01), Welch
patent: 5962893 (1999-10-01), Omura
patent: 6303479 (2001-10-01), Snyder
patent: 6353251 (2002-03-01), Kimura
M. P. Lepselter and S. M. Sze, “SB-IGFET: An Insulated-Gate Field-Effect Transistor Using Schottky Barrier Contacts for Source and Drain”, Proc. IEEE, pp. 1400-1402, Aug. 1968.
J. R. Tucker, C. Wang, and P. S. Carney, “Silicon Field-Effect Transistor Based on Quantum Tunneling”, Appl. Phys. Lett, vol. 65, no. 5, pp. 618-620, Aug. 1994.
B. Winstead and U. Ravaioli, “Simulation of Schottky Barrier MOSFET's with a Coupled Quantum Injection/Monte Carlo Technique”, IEEE Trans. Electron Devices, vol. 47, no. 6, pp. 1241-1246, Jun. 2000.
J. Kedzierski, P. Xuan, E. H. Anderson, J. Bokor, T.-J. King, and C. Hu, “Complementary Silicide Source/Drain Thin-Body MOSFETs for the 20nm Gate Length Regime”, IEDM Tech. Digest, pp. 57-60, 2000.
J. D. Plummer and P. B. Griffin, “Material and Process Limits in Silicon VLSI Technology”, Proc. IEEE, vol. 89, no. 3, pp. 240-258, 2001.
D. J. Frank, R. H. Dennard, E. Nowak, P. M. Solomon, Y. Taur, and H.-S. P. Wong, “Device Scaling Limits of Si MOSFETs and Their Application Dependencies”, Proc. IEEE, vol. 89, no. 3, pp. 259-288, 2001.
Semiconductor Industry Association, “International Technology Roadmap for Semiconductors 2002 Update”, 2002.
Y. Zhang, J. Wang, L. Wang, and B.-Y. Nguyen, “Design of 10-nm-Scale Recessed Asymmetric Schottky Barrier MOSFETs”, IEEE Electron Device Letters, vol. 23, no. 7, pp. 419-421, 2002.

Affiliated with

Also associated with

Rating

Schottky-barrier tunneling transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Schottky-barrier tunneling transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Schottky-barrier tunneling transistor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3491781