Patent
1991-02-26
1992-02-11
James, Andrew J.
357 15, 357 16, H01L 2980
Patent
active
050879502
ABSTRACT:
A schottky barrier junction gate type field effect transistor includes a buffer layer formed on a semi-insulating GaAs substrate and including at least an undoped GaAs crystalline layer, a first n-type GaAs crystalline layer of a first carrier concentration formed on the buffer layer, and a second n-type GaAs crystalline layer formed on the first n-type GaAs crystalline layer and having a second carrier concentration which is lower than the first carrier concentration. A gate electrode made of a Schottky barrier metal is formed on the second n-type GaAs crystalline layer, and a pair of ohmic electrodes are formed at opposite sides of the gate electrode separately from the gate electrode. A third n-type GaAs crystalline layer is formed under each of the pair of ohmic electrodes and has a third carrier concentration which is higher than the first carrier concentration, and a fourth n-type GaAs crystalline layer is formed between the third n-type GaAs crystalline layer and a region which is composed of the first and second n-type GaAs crystalline layers. The fourth n-type GaAs crystalline layer has a fourth carrier concentration which is not less than the first carrier concentration, and a thickness corresponding to a total thickness of the first and second n-type GaAs crystalline layers.
REFERENCES:
patent: H368 (1987-11-01), Yoder
patent: 4393578 (1983-07-01), Cady et al.
patent: 4636822 (1987-01-01), Codella et al.
Crane Sara W.
James Andrew J.
NEC Corporation
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