Schottky barrier gate FET including tungsten-aluminum alloy

Details Schottky barrier gate FET including tungsten-aluminum alloy Schottky barrier gate FET including tungsten-aluminum alloy

1984-04-02

1986-04-29

Carroll, James J.

Metal treatment

Stock

Ferrous

357 15, 357 67, 148139, 148140, 427 84, H01L 2948, H01L 2980, H01L 2348, H01L 2956

Patent

active

045860637

ABSTRACT:
A semiconductor device and a method of manufacturing the same are disclosed. The device comprises a GaAs semiconductor body, a source and a drain region formed in the semiconductor body, a channel region placed between the source and drain regions, a source and a drain electrodes provided by patterning treatment onto the surfaces of the source and drain regions and making ohmic contact thereto, and a gate electrode provided onto the surface of the channel region and consisting of a W-Al alloy. The method comprises steps of providing a GaAs semiconductor body as a substrate, forming an active layer into the body, forming a pattern of a W-Al alloy as a gate electrode, implanting donor ion with high concentration into a region including a portion of the active layer other than the underlying region of the portion on which the gate electrode is at least provided thereby forming a source and a drain region, subjecting the semiconductor body to an annealing treatment to activate the active layer and the source and drain regions, and providing ohmic contacts onto the source and drain regions.

REFERENCES:
patent: 3652905 (1972-03-01), Page
patent: 4017890 (1977-04-01), Howard et al.
patent: 4048646 (1977-09-01), Ogawa et al.
patent: 4048712 (1977-09-01), Buiatti
patent: 4141020 (1979-02-01), Howard et al.
Yokoyama et al, "Ti/W Silicide Gate Technology for Self-Aligned GaAs MESFET VlSIS", IEEE 1981, IEDM 81, pp. 80-83.

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