Scheme for controlling rise-fall times in signal transitions

Details Scheme for controlling rise-fall times in signal transitions Scheme for controlling rise-fall times in signal transitions

2007-08-31

2010-06-15

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Slope control of leading or trailing edge of rectangular or...

C327S283000, C327S284000, C327S263000, C327S268000

Reexamination Certificate

active

07737747

ABSTRACT:
A serial interface interacting with a transmission pad system circuitry wherein a differential impedance is reckoned across the system voltage source, includes a scheme for controlling transmitter rise-fall transitions (to selectively speed up or slow down transitions) without requiring additional timing controls or affecting reflection coefficient of the transmitter port. The scheme uses at least one pre-charged capacitor, e.g., PMOS capacitor, interacting with the transmitter pad and connected through resistances or otherwise across the differential impedance with a switch. A modified scheme uses first and second parallely connected PMOS capacitors connectable with the transmission pad by switches, which may be NMOS switches. The scheme may be used in a MIPI D-PHY compliant DSI transmitter operating at, for e.g. 800 Mbps, and low signal common-modes. The scheme controls signal transition times of high speed circuitry including transmitters and uses a DATA signal which is already available to the circuitry.

REFERENCES:
patent: 3940635 (1976-02-01), Meyer
patent: 6281715 (2001-08-01), DeClue et al.
patent: 6573778 (2003-06-01), Salome et al.
patent: 6628150 (2003-09-01), Carvajal et al.
5Gbps Serial Link Transmitter with Pre-emphasis. Chih-Hsien Lin et al. IEEE 2003. This paper can be found in this location: http://ieeexplore.ieee.org/iel5/8504/26878/01195127.pdf.

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