Scheduling mechanism for network adapter to minimize latency and

Details Scheduling mechanism for network adapter to minimize latency and Scheduling mechanism for network adapter to minimize latency and

1992-09-15

1995-04-04

Harvey, Jack B.

Boots, shoes, and leggings

395650, 395200, 3642411, 364242, 364DIG1, 3649405, 3649415, 364DIG2, G06F 900

Patent

active

054045363

ABSTRACT:
Method and apparatus for scheduling operations of a network adapter in such a way as to minimize latency in processing received data packets, while still guaranteeing time for processing necessary background tasks. The method includes executing a polling loop in which repeated tests are made for the presence of receive data to process, but only a limited amount of receive data processing is performed before checking for background processing that needs to be performed. The polling loop ensures that immediate attention is given to processing of receive data, without the inherent latency of interrupt processing, but still gives periodic opportunities for background processing. Background processing is performed for a guaranteed minimum processing time before permitting a return to receive processing. Background processing may be performed without a guaranteed minimum processing time, but only when there is currently no receive processing to do.

REFERENCES:
patent: 3905025 (1975-09-01), Davis et al.
patent: 4314334 (1982-02-01), Daughton et al.
patent: 4658351 (1987-04-01), Teng
patent: 5142675 (1992-08-01), Oi et al.
patent: 5161223 (1992-11-01), Abraham
patent: 5193189 (1993-03-01), Flood et al.

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