Scheduler reducing cache failures after check points in a...

Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing – Least weight routing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C712S228000, C714S015000, C714S020000

Reexamination Certificate

active

06279027

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a process switch apparatus suitably applied to, for example, a dispatcher of a computer system having a check point recovery function.
A conventional database management system is provided with a process (referred to as a log writer hereinafter) exclusively for writing a history of transaction processing (log) to a disk apparatus or the like. This log writer writes log data, which has been written to a log buffer area secured in a main memory, to the disk apparatus in a response to an instruction from another process or in predetermined timing. In order to maintain the consistency of a database, when the transaction is committed, its commit log has to be written to the disk apparatus. If, therefore, a process under execution of transaction starts a commit processing, it instructs the log writer to write its own commit log to the disk apparatus. In the log writer responds that the commit log has been written to the disk apparatus, the process under execution of transaction completes the commit processing.
Let us consider that the above database management system is operated in a computer system which causes a delay in writing to the disk apparatus until the next check point. These check points are picked up properly in order to allow a processing to be resumed while maintaining the matching of the whole system when the processing is interrupted due to a malfunction, and the states of the system (those of the CPU and main memory) necessary for continuing the processing is recorded for each of the check points.
As illustrated in
FIG. 1
, when the process under execution of transaction
1
(T
1
) starts a commit processing (
1
), it instructs a log writer to write its own commit log to a disk apparatus. The log writer issues a command (write) for writing the commit log to the disk apparatus (
2
). In the computer system, however, the writing to the disk apparatus is delayed (
4
) until the next check point (
3
), and the log writer is placed in the writing standby (sleep) state until then.
In this state, when the process under execution of another transaction
2
(T
2
) starts a commit processing (
5
), even though it instructs the log writer to write a commit log, the reception of the writing is delayed until its preceding writing is finished (
6
). The writing is also delayed (
8
) until the next check point (
7
).
In the computer system described above, the process exclusively used for picking up a check point (hereinafter referred to as a check point process) is executed by a processor to prevent the other processes from being operated during the pickup of the check point. Since the check point process is scheduled by the first priority, the process executed immediately before the check point is interrupted and the check point process starts to be executed. The check point process simply goes around an idle loop and hardly replaces data of a cache while hardware for a cache flash is returning data from a dirty line of the cache to a main memory. Thus, data to which the process executed immediately before the check point accesses, is held as it is in the cache at the end of the check point. However, the process executed immediately before the processing of the check point is completed, is not always prioritized. If another process is executed, neither cached commands nor data can be used, thus increasing in cache miss.
The first problem of the foregoing conventional system is that the process is switched to the log writer fairly prior to the check point. In other words, if the switching of the process is delayed until immediately before the check point, the commit log indicated later can be written to the disk apparatus, together with the commit log indicated earlier, at the next check point, thus improving in throughput.
The second problem is that the process executed immediately before the check point is not prioritized at the time of completion of the check point. In other words, taking into consideration that the check point process hardly replaces data of the cache, a cache miss can greatly be reduced by prioritizing the process executed immediately before the check point.
In a multiprocessor system as disclosed in U.S. Pat. Nos. 5,261,053 and 5,185,861, if the same process as the last process is executed within a predetermined period of time after the last process is executed, the last process is also assigned to the same processor. Since, in this case, no check point process is taken into consideration, the assignment of the process is not effectively controlled immediately after a check point if the time required for the check point process is long.
BRIEF SUMMARY OF THE INVENTION
It is accordingly an object of the present invention to provide a process switch apparatus capable of improving the throughput of a system by minimizing an influence of delay in processing necessary for securing the matching of the system and greatly reducing a cache miss after a check point is picked up.
To attain the above object, according to a first aspect of the present invention, there is provided a process switch apparatus in a computer system for properly picking up a check point for resuming an interrupted processing, and delaying a processing according to a request that data is to be output to an external device, which is made between two continuous check points, until a later-occurring one of the check points is picked up, the apparatus comprising:
storing means for storing processes including the processing according to the request and designed in advance to be executed only immediately before the check point;
detecting means for detecting a pickup point of a check point subsequent to the check point; and
scheduling means for, when the detecting means detects the pickup point of the check point, scheduling an executable one of the processes stored in the storing means immediately before the pickup point of the check point.
In the process switch apparatus described above, as in the log writer, the selection of a process exclusively for writing data to a disk can be delayed until immediately before the pickup point of a check point, and a plurality of writing requests made in one interval between continuous check points, can be made as one request at the next check point. Thus, not only the response time of the commit processing can be shortened, but also the throughput can be improved by group commit.
According to a second aspect of the present invention, there is provided a process switch apparatus in a computer system for properly picking up a check point for resuming an interrupted processing, comprising:
storing means for storing a process executed immediately before the check point; and
scheduling means for, when the process stored in the storing means is executable immediately after the check point is picked up, scheduling the process by priority.
In the process switch apparatus described above, when a process, which was executed immediately before a check point, is in an executable state, the process is scheduled by priority. Since, at the completion of the check point, a large amount of data to which the process executed immediately before the check point accesses, remains in a cache, the hit ratio is improved more than when another process is executed. The system can thus be improved in performance.
According to a third aspect of the present invention, there is provided a process switch apparatus in a computer system for properly picking up a check point for resuming an interrupted processing, comprising:
storing means for storing execution order of processes to be executed before the check point; and
scheduling means for, when the processes stored in the storing means are executable immediately after the check point is picked up, scheduling one of the processes, which is nearest to the check point, by priority.
In the process switch apparatus described above, a process executed nearest to a check point is scheduled by priority immediately after the check point. Generally, there is strong possibility that data of a

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Scheduler reducing cache failures after check points in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Scheduler reducing cache failures after check points in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Scheduler reducing cache failures after check points in a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2514425

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.