Scene synchronization of multiple computer displays

Details Scene synchronization of multiple computer displays Scene synchronization of multiple computer displays

1997-12-17

1999-09-21

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Plural graphics processors

345503, 345505, 345508, 345 1, 395553, G06F 1516

Patent

active

059560460

ABSTRACT:
A multi-display video system for ensuring the proper synchronization of scene switching. Before each display switches to pixel data corresponding to the next scene to be rendered, new pixel data is written into a currently unused bank of frame buffer memory within a corresponding graphics accelerator. When each graphics accelerator in the video system has completed writing the new pixel data to its respective frame buffer, the scene switch may take place. Each graphics accelerator is configured to display an image corresponding to the next scene in response to the indicator output signal indicating that the pixel data updates for all graphics accelerators are complete.

REFERENCES:
patent: 4908614 (1990-03-01), Yamagishi
patent: 5275565 (1994-01-01), Moncrief
patent: 5374940 (1994-12-01), Corio
patent: 5546530 (1996-08-01), Grimaud et al.
patent: 5765009 (1998-06-01), Ishizaka

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