Data processing: measuring – calibrating – or testing – Measurement system – Temperature measuring system
Reexamination Certificate
1999-12-10
2003-02-04
Shah, Kamini (Department: 2863)
Data processing: measuring, calibrating, or testing
Measurement system
Temperature measuring system
C324S248000, C324S250000
Reexamination Certificate
active
06516281
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention described herein relates to imaging. In particular, the invention relates to sensing electric fields.
2. Related Art
The occurrence of wiring defects in computer chips and multi-chip modules is a serious manufacturing problem. Most types of circuit faults can be localized to more or less definite regions on a chip simply because they produce failures in specific sections of the circuit. If the precise location of a circuit defect could be determined, then the likely cause could be ascertained and changes could be made in the design or fabrication process to correct the problem and improve the yield.
The most common type of fault which manufacturers encounter in present day chips is an unintended electrical open. An open can arise for a variety of reasons. One type of open involves a failed connection at a connection between wires on different layers of a chip, also known as a via. This can happen when a hole is being etched through an insulating layer and the etch is not quite completed, leaving a thin insulating layer between the upper and lower wiring layers. This type of failure is more common for holes with a large ratio of depth to diameter; such holes tend to be used in high-density chips. Another type of failure involves electro migration, creating a void or constriction which eventually causes a wire to open. Again, because of the use of narrow linewidths, this type of failure is more likely in high density chips. If a fault can be precisely located, then there are a wide variety of well-established powerful analysis techniques that can be used to fully characterize the fault. For example, high-resolution transmission electron microscopy (TEM) can be used to analyze the presence of interfacial layers, detect regions of poor coverage, or determine material structure and composition.
Because of the seriousness of the problem, many techniques have been developed for precisely locating electrical faults. Some of these techniques are quite sophisticated, but only work for certain specific types of failures. For example, CCD cameras have been used to look through silicon chips and image photons emitted by working transistors, so that one can tell which transistors are operating. Unfortunately, a break in a wiring layer is not expected to emit photons, so that this technique is of little use in locating opens. Other techniques are quite well-known and widely used, but have serious limitations. For example, micro-probes can be used to measure the voltage along a line until the open is found. A more sophisticated version of this approach is to use voltage contrast electron microscopy to detect voltage and ground levels on wires and contacts. However, such techniques will not work if a line lies under other wires or is buried under a thick insulating layer. Worse yet, many manufacturers now use face-down surface mounting, known as flip-chip bonding, to attach chips to a carrier. With such an arrangement the wiring on a chip is buried under 100 microns (&mgr;m) or more of silicon, and is inaccessible to techniques such as atomic-force microscopy, scanning electric field microscopy, or scanning tunneling microscopy which rely on contact or near-contact.
Considered from a broader perspective, the end of an open line produces few signatures which can be used to reveal its location. Since an open generally has a very high resistance, only a small or negligible current will pass through the fault and generally there will be little heating. Thus, although infrared imaging has been used to look through chips to find short circuits, it generally does not work for high-resistance opens. Similarly, a fairly exotic technique such as superconducting quantum interference device (SQUID) -based magnetic microscopy also fails because it depends on current flow. Imaging using SQUID technology is discussed in U.S. Pat. No. 5,894,220, “Apparatus for Microscopic Imaging of Electrical and Magnetic Properties of Room Temperature Objects,” Wellstood et al., incorporated by reference herein in its entirety.
Other techniques will work in general, but are quite time consuming or destructive. For example, a focused ion beam can be used to drill through layers to allow access for a microprobe or scanning electron microscope (SEM) which can then measure voltage. If the location of the fault were precisely known, this would be a straight-forward technique. However, if the job is to find the precise location of a fault, then quite a few test holes might be needed. An alternative is to simply polish away everything, all the way down to the wiring layer. Clearly this is quite destructive and would not generally work because it would destroy other connections in the chip.
Hence there is a need for a system and method for detecting opens in chips, multi-chip modules and similar devices, where the process is non-destructive, practical, and efficient.
SUMMARY OF THE INVENTION
The invention described herein is a system, method, and computer program product for scanning objects such as computer chips. The invention uses a near-field scanning Single Electron Transistor (SET) to detect features of the object. In particular, the SET detects variations in an electric field surrounding or emanating from the object. The variation in the field may be associated with an irregularity in the object, such as an open in the circuitry of a chip. In the case of a chip or a multi-chip module, a voltage is applied to the line containing the suspected open. If an actual open is present, the open will be manifested in an irregularity in the electric field associated with the line. The SET detects the irregularity in the field. For the SET to operate, a sufficiently cold operating temperature is maintained for the SET. A very low (cryogenic) temperature allows the use of a larger, more sensitive SET. Scanning SETs are known in the literature, but in such systems the object to be scanned must also be at cryogenic temperatures. In the invention described herein, the object to be scanned can be left at a temperature in its normal environmental temperature range. This temperature range is referred to hereinafter as the ambient temperature range of the object. A chip, for example, typically operates in an ambient temperature range that includes room temperature. Data from the SET indicating irregularity in the electric field can be used to derive readout data, which can in turn be used to produce an image of the object scanned.
Features and Advantages
The invention described herein has the feature of being able to detect very weak variations in an electric field using an SET. The invention has the additional feature of being able to produce an image of an object based on the electric field surrounding or emanating from the object.
The invention has the advantage of performing imaging of an object that is kept at its ambient temperature range and that need not be cryogenically cooled. The invention has the further advantage of performing imaging nondestructively.
REFERENCES:
patent: 5491411 (1996-02-01), Wellstood et al.
patent: 5894220 (1999-04-01), Wellstood et al.
patent: 5900618 (1999-05-01), Anlage et al.
patent: WO 97/29385 (1997-02-01), None
“Scanning Single Electron Transistor Microscopy: Imaging Individual Charges,” M.J. Yoo et al.Science, v. 276 pp. 579-582, Apr. 25, 1997.
“Scanning Single Electron Transistor Microscopy: Imaging Individual Charges,” M.J. Yoo et al. International Conference on Solid State Devices and Materials, JA, Japan Society of Applied Physics, Sep. 1998, pp. 200-201.
“Non-contact VLSI imaging using a scanning potential microscope,” R.J. Prance et al. Meas. Sci. Technol., v. 9 pp. 1229-1235, Sep. 1998.
Kenyon Matthew Edward
Lobb Christopher J.
Wellstood Frederick C.
Rosenberg , Klein & Lee
Shah Kamini
University of Maryland
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