Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit
Patent
1990-03-12
1991-04-09
Nelms, David C.
Radiant energy
Photocells; circuits and apparatus
Photocell controlled circuit
2502083, H01J 4014
Patent
active
050067028
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a scanning circuit for successively delivering voltages to a set of circuit elements, and more specifically to a scanning circuit suitable for use in a one-dimensional image sensor.
BACKGROUND ART
The image scanner has been known which comprises photoelectric converters for translating optical information into electric signals, and analog switches for electrically scanning the photoelectric converters to selectively obtain the electric signals. The analog switches may take the form of field-effect transistors (FETs) disposed adjacent the photoelectric converters, as taught by Japanese Unexamined Patent No. 63-2377 laid open to public inspection on Jan. 7, 1988.
In an image sensor fabricated in the form of an integrated circuit, each FET must be sized to fit the width (e.g. 125 micrometers) of one photoelectric converter, that is, of one picture element. However, it is no easy task to form the FETs of that size. The difficulty increases as the three wiring conductors of minimum widths for the drain, source and gate of each FET must be formed on prescribed narrow parts of the baseplate.
The present invention aims at the provision of a scanning circuit utilizing diodes which have a smaller number of electrodes than transistors.
DISCLOSURE OF INVENTION
The scanning circuit of this invention comprises a voltage source for generating a sawtooth wave as a scanning or sweep voltage; a first series circuit having a plurality of diodes interconnected in series and each having a first and a second electrode, the first series circuit being connected to a first terminal of the voltage source; a plurality of second series circuits each having a resistor and a diode interconnected in series, the second series circuit being connected one between the second electrode (e.g. cathode) of each diode of the first series circuit and a second terminal of the voltage source; a plurality of resistors connected one between the second electrode of each diode of the first series circuit and the second terminal of the voltage source; and a plurality of scanned circuit elements connected substantially in parallel with the respective diodes of the second series circuits. The diodes of the first and second series circuits are all so oriented as to be forward biased by the sawtooth wave. As the sawtooth wave is supplied to the first and second series circuits from the voltage source, the diodes included in these circuits become sequentially conductive, with the result that the circuit elements are successively scanned electrically.
BRIEF DESCRIPTION OF DRAWINGS
FIG. 1 is a schematic electrical diagram of an image sensor embodying the principles of the present invention.
FIG. 2 is a waveform diagram of the sawtooth wave generated by the voltage source of FIG. 1.
FIGS. 3 and 4 are waveform diagrams of alternate sawtooth waves to be generated by the voltage source.
FIG. 5 is a schematic electrical diagram of a circuit equivalent to each photoelectric converter of FIG. 1.
FIG. 6, consisting of (A)-(C), is a waveform diagram showing the waveforms of voltages appearing in the image sensor of FIG. 1, (A) showing potentials at the points of connection of the four photoelectric converters, (B) showing the output voltage when optical inputs are supplied to all the photoelectric converters, and (C) showing the output voltage when optical inputs are supplied to all but one of the photoelectric converters.
FIG. 7 is a schematic electrical diagram of a modified circuit for deriving an output voltage from the photoelectric converters.
FIGS. 8 and 9 are schematic electrical diagrams of modified image sensors in which the blocking diodes are connected in positions different from those in the image sensor of FIG. 1.
FIG. 10 is a schematic electrical diagram of a modified circuit having photoelectric converters different from those used in the circuit of FIG. 1.
FIG. 11 is a block diagram explanatory of a method of driving the photoelectric converters in the case where a large number of photoelectric
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patent: 4785191 (1988-11-01), Ondris
Japanese Unexamined Patent Pub. No. 63-2377, Hatanaka et al., Jan. 7, 1988.
Japanese Unexamined Patent Pub. No. 61-203771, Nakayama et al., Sep. 9, 1986.
Japanese Patent Pub. No. 43-30205, Ando, Dec. 25, 1968.
Japanese Patent Publication No. 47-9050, Netsu, Mar. 16, 1972.
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Iida Hideo
Kakinuma Hiromi
Messinger Michael
Nelms David C.
Taiyo Yuden Co. Ltd.
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