Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2007-08-14
2007-08-14
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000, C345S204000, C345S208000
Reexamination Certificate
active
10462638
ABSTRACT:
A scanner integrated circuit comprises a gate integrated circuit including a shift register, a delay unit, a voltage detecting unit and a logic unit for achieving an output enable function so that the integrated circuit can reduce the pin numbers and the package volume and decrease the chip cost.
REFERENCES:
patent: 3946320 (1976-03-01), Overbury et al.
patent: 5160190 (1992-11-01), Farrell et al.
patent: 6040828 (2000-03-01), Park
patent: 6133860 (2000-10-01), Ryu et al.
patent: 6853372 (2005-02-01), Kanzaki et al.
patent: 2003/0174116 (2003-09-01), Maeda et al.
patent: 2354603 (1978-01-01), None
Huang Juin-Ying
Huang Shih-Hsiung
Tseng Wen-Tse
Chunghwa Picture Tubes Ltd.
Hjerpe Richard
Shapiro Leonid
Troxell Law Office PLLC
LandOfFree
Scanner integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Scanner integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Scanner integrated circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3847319