Scannable latch

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S208000, C326S098000, C714S726000

Reexamination Certificate

active

07746140

ABSTRACT:
A scannable latch is disclosed. The scannable latch includes a dynamic circuit, two cross-coupled NAND gates coupled to the dynamic circuit, and a pair of stacked transistors coupled to the dynamic circuit. One of the stacked transistors is for receiving data signals, and the other stacked transistors is for receiving scan in signals.

REFERENCES:
patent: 4797838 (1989-01-01), Nelson et al.
patent: 5272397 (1993-12-01), Chen et al.
patent: 5870411 (1999-02-01), Durham et al.
patent: 6201415 (2001-03-01), Manglore
patent: 6925590 (2005-08-01), Campbell
patent: 2003/0226077 (2003-12-01), Zyuban et al.

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