Scan test viewing and analysis tool

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

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Details

C702S059000, C702S117000, C702S119000, C702S123000, C716S030000, C716S030000, C714S030000, C714S726000, C370S241000, C703S014000, C324S765010

Reexamination Certificate

active

06925406

ABSTRACT:
A scan test viewing and analysis tool for an integrated circuit tester provides inter-related views of scan tests on an integrated circuit device. The tool processes a test program specification, execution results and device definition to produce cross-referencing data, which the tool then uses to provide navigation links between correlated locations in a cyclized test view, procedural test program view, and views of signal vectors, scan state and scan vectors. The tool also provides a capability to edit the test program in the views.

REFERENCES:
patent: 6704895 (2004-03-01), Swoboda et al.
patent: 2001/0022743 (2001-09-01), Sato et al.
patent: 2002/0073374 (2002-06-01), Danialy et al.
patent: 2004/0004216 (2004-01-01), Eldridge et al.
Winters, ‘ Using IEEE-1149.1 For In-Circuit Simulation’, Sep. 27-29, 1994 , IEEE Article, pp. 525-528.
Burgess Jr., et al., ‘Boundary Scan’, Aug./Sep. 1995, IEEE Article, pp. 11-12.

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