Scan test apparatus for digital systems having dynamic random ac

Details Scan test apparatus for digital systems having dynamic random ac Scan test apparatus for digital systems having dynamic random ac

1987-04-16

1989-05-02

Smith, Jerry

Excavating

371 21, G01R 3128

Patent

active

048274763

ABSTRACT:
A scan test apparatus is constructed to scan test a digital system having a memory system containing dynamic random access memory (DRAM). The scan test apparatus is given access to the memory system so that test control signals can preset the refresh counter (for the DRAM) and initialize the memory for later testing.

REFERENCES:
patent: 4049956 (1977-09-01), Van Veen
patent: 4493081 (1985-01-01), Schmidt
patent: 4601034 (1986-07-01), Sridhar
patent: 4622668 (1986-11-01), Dancker
patent: 4654827 (1987-03-01), Childers
patent: 4757503 (1988-07-01), Hayes
IBM TDB, "Embedded Array Test With ECIPT", vol. 28, No. 6, 11/1985, pp. 2376-2378.
"A Survey of Design for Testability Scan Techniques", by E. J. McCluskey, Semicustom Design Guide, Summer 1986, pp. 110-119.

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