Scan path circuitry including a programmable delay circuit

Details Scan path circuitry including a programmable delay circuit Scan path circuitry including a programmable delay circuit

1997-09-17

1999-08-10

Canney, Vincent P.

Excavating

G06F 1100

Patent

active

059369779

ABSTRACT:
A circuit for delaying a signal. The circuit includes a scan register, a logic circuit, and a programmable delay circuit. The scan register stores scan data and the logic circuit selectively decodes the scan data. The programmable delay circuit is coupled to the logic circuit and delays a signal a programmable amount of time in response to the decoded scan data.

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