Scan chain for shifting the state of a processor into memory at

Details Scan chain for shifting the state of a processor into memory at Scan chain for shifting the state of a processor into memory at

1995-12-04

1997-09-23

Nguyen, Hoa T.

Excavating

G01R 3128

Patent

active

056712359

ABSTRACT:
In a semiconductor device having a processor for processing digital data and RAM for storing the digital data, an apparatus for accessing the state of the digital data stored in the RAM during system operation for testing purposes. A stall controller is used to stall the processor at a specified point of execution during system operation. The state of the processor at that particular point is shifted out of the registers by using a scan chain and temporarily stored into a buffer. A memory controller then instructs the RAM to write the data of interest into a specific set of test registers. The scan chain is routed through these test registers so that it can serially shift out the data written from the RAM. Thereby, the RAM contents can be accessed with minimal overhead by using the scan chain. Once the data has been shifted out from test registers, the current state of the processor that was stored into the buffer is fed back to the processor. The processor is unstalled and allowed to continue with its normal mode of operation.

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