Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2007-01-16
2007-01-16
Raymond, Edward (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C712S032000
Reexamination Certificate
active
10976259
ABSTRACT:
An apparatus, a method and a computer program product are provided for conserving energy during functional mode of a processor by disabling the scan chain. By inserting logic gating into the scan chain it is possible to disable the scan chain during the processor's functional mode. During functional mode the scan out port of the latch bit in a scan chain toggles, which leads to unnecessary energy consumption. By gating scan control signals and the scan out port of a latch bit, the scan chain segment between latch bits can be disconnected. Therefore, the scan control signals can disable the scan chain during functional mode.
REFERENCES:
patent: 6114892 (2000-09-01), Jin
patent: 6397301 (2002-05-01), Quach et al.
patent: 6665828 (2003-12-01), Arimilli et al.
patent: 6681356 (2004-01-01), Gerowitz et al.
Dhong Sang Hoo
Silberman Joel Abraham
Takahashi Osamu
Warnock James Douglas
Wendel Dieter
Carwell Robert M.
Gerhardt Diana R.
International Business Machines - Corporation
Raymond Edward
Walder, Jr. Stephen J.
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