Scaleable refresh display controller

Computer graphics processing and selective visual display system – Display driving control circuitry

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Details

345127, 34082544, G09G 500

Patent

active

057963916

ABSTRACT:
A display controller (112) reduces the power consumed in displaying a graphics image in a portable wireless communications device (100) when a graphics image is smaller than the size of the display (118). The number of rows and columns used to display the graphics image is counted by a decoder (108) which is a microcontroller used to operate the communications device (100). The decoder (108) provides the reduced row or column count to the display controller (112), which reduces the frequencies of clocks (PIXEL CLOCK, LINE PULSE, FRAME PULSE) used for timing data transfers to the display (118). Power is reduced by operating the display (118) at a lower frequency while acceptable frame refresh rates are maintained.

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patent: 5592194 (1997-01-01), Nishikawa

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